Synopsys Intern
新思科技(上海)有限公司
- 公司规模:500-1000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2015-01-29
- 工作地点:上海
- 招聘人数:若干
- 工作经验:在读学生
- 学历要求:本科
- 语言要求:英语良好
- 职位月薪:面议
- 职位类别:软件工程师 集成电路IC设计/应用工程师
职位描述
公司介绍:
Synopsys公司(Nasdaq: SNPS)是全球领先的电子设计自动化(EDA)软件工具领导厂商,为全球电子市场提供技术先进的集成电路(IC)设计与验证平台,致力于复杂的芯片上系 统(SoCs)的开发。同时,Synopsys公司还提供知识产权(IP)和设计服务,为客户简化设计过程,提高产品上市速度。Synopsys公司总部 设在美国加利福尼亚州Mountain View,有超过60家分公司分布在北美、欧洲、日本与亚洲。
Synopsys的产品遍及整个设计流程,让客户能够在从设计技术规格制订到芯片制作的全过程中使用统一的最佳技术。它的Galaxy? Design Platform和Discovery? Verification Platform向客户提供了用于先进的IC设计和验证的整套工具套件。
实习安排:
我们将从每年三月起接受学生的简历投递,通过严格的面试筛选,安排学生参加实习,实习周期为三个月,择优挑选可进入下一个实习周期。实习以项目为主,能接触到EDA (电子设计自动化)行业最前沿的技术,并能得到公司资深工程师的培训和指导,从中领略跨国美资企业的工作氛围与人文环境。
1. RD Engineer Intern for Database developing
1) Master/PhD candidate in Computer Science department, EE department or relative specialties.
2) Very strong C/C++/Java software development skills on Unix/Linux.
3) Very strong relational DB knowledge, including designing, implementing, optimizing and maintaining.
4) Very good at Computer Science fundamentals such as data structure, compiler theory, and operation system.
5) Had experience on complex software system, with strong problem solving skills and learning ability.
6) Good Chinese/English communication skill, good team player.
7) Highly motivated, committed and responsible to work, driven for quality,
8) Can work in office at least 3 days/week.
Nice to have:
1) Database design experience is a strong plus.
2) Application development based on the DB experience is a strong plus.
3) Knowledge of digital design, VHDL/Verilog is a good plus.
2. RD Engineer Intern of Deterministic Replay of Multi-threaded
The candidate will be working on a quite innovative project, which is to make multi-threaded program determinisitc. The work will be deployed to commercial large scale software product and make a great compact to the product.
The candidate should have:
a) Good knowledge of multi-threading.
b) Strong problem solving skills.
c) Good programming skills and self-motivated.
3. Validation RD of Database and Customer Issue Supporting
The ideal candidate should
have a basic understanding of the ASIC design flow;
is good at Perl or Tcl scripting;
has some basic knowledge on the commercial EDA tools like ICC is preferred.
He/she should have good communication skill and English skill, good learning capability and analytical skill.
4. RD for Improving GUI Manual Testing
This person will work within the quality assurance group for the Hercules/IC Validator Physical Verification (PV) product line. He or she will develop and deploy new GUI testing tools -- Tplan-Robot to improve ICV_VUE testing
Requirements:
-Familiar Unix/Linux environment
-Java programming capability
-High motivation to learn new skills and explore different technologies
-Good communication of English
-CS background
5. Job Description RD Engineer Intern of PRAG Program
a. Work with mentor to decide the structure of PRAG.
b. Implement Template Generator and Flow Generator with perl/python/tcl.
c. Assemble the two parts above to PRAG with user-friendly interface.
d. Complete the documentation of PRAG and demo to users.
Intern Requirement
a. At least 3 days to work per week.
b. Skilled at a script language like perl, python, tcl, etc.
c. Good communication skills
d. A good team player with high flexibility and responsibility.
6. Validator Performance Test Platform Upgrade
Job description:
The project is to build a new ICV Validator Performance Test Platform
The new platform is targeted to generate more detailed and vivid report and different aspects to track the latest performance feature in different aspects for quality endurance performance and qualification data reference.
Job Requirement:
1. Familiar with Linux/Unix system
2. Experience in Perl Programming is required
3. Experience in Perl CGI Programming is a plus
4. Good communication skills in both Chinese and English
7. RD Engineer Intern for testing platform developing
Intern’s job is to develop a testing platform in which combines input data selection, flow generation and report generation. Intern will also develop many Tcl scripts to auto-check the flow result. The platform will be targeted for daily feature testing job.
Requirements:
1. Good Digital Electronics background
2. Strong scripting skill
3. Self-learning skill and good communication skill
Nice to have (Not a must):
1. Tcl scripting language
2. Physical Implementation background
8. RD Engineer Intern for System Verilog data representation transforming
Job Description:
This candidate will be responsible for the complied SV design data representation translation for SV interface, modport, package, from VIR which is VCS data representation to VIF which is Leda data representation in order for Leda checker to run on. He or she will need to work with local team as well as global teams to achieve project goals.
Job Requirements:
- Hands-on experience with C/C++ programming
- Strong background in data structures and algorithms
- Working knowledge of HDL
- Strong communication skill, fluent in both spoken and written English
- Strong team work ethic and can-do attitude
- Knowledge of Linux, Tcl is definitely a plus
9. RD Engineer Intern of Language Check for Data Model
This candidate will be responsible for designing and developing new algorithms and prototypes. He or she will need to work with local team as well as global teams to achieve project goals.
Requirement
1. 2-year MS or PhD student in CS
2. Hands-on experience with C/C++ programming, familiar with STL
3. Education background in Program Analysis is a plus
4. Able to design algorithms and data structures, understanding of algorithm complexity is a plus
5. Team work ethic and can-do attitude
10. RD Engineer Intern for Power switch connectivity
Job Description:
Responsible for research and development of EDA tools in ASIC back-end flow, focusing on software development and methodology to reduce power-consumption in the cutting-edge flow of low-power chip design. Design and implement sophisticated algorithms to solve complex Multi-Voltage chip-design issues. Actively participating and advancing solutions based on IEEE Low Power Format.
Job Requirements:
1) Preferred student 2.5/3 yr in graduate school or right now for master/PHD degree with EE background.
2) Must have rich experience in the following CS fields:
a. Programming language (Shell, TCL, Perl)
b. Linux /Solaris Unix operating system
3) Strong desires to explore new technologies and able to demonstrate good learning and problem solving skills.
4) Good written and verbal English communication skills are necessary.
5) Self-motivated and good team working spirit.
6) Experience in EDA industry or IC design especially in back-end flow and / or low-power flow is a plus.
11. RD Engineer of new correlation generator
Description:
Static Timing analysis is used to verify the timing of the entire design before fabrication. Parasitic parameters are used in timing analysis to simulate the propagation of signals on wires. PrimeTime is a much powerful tool to validate timing violation of the entire design, although IC Compiler also provides smart and fast timing analysis. StarRC is one of important tool in parasitic extraction which provides much accurate resistance and capacitance. To valuating the performance of timing or RC extraction in IC Compiler, correlation with PrimeTime/StarRC from is the most efficient method in testing.
Intern’s job is to develop a correlation generator for both timing and RC correlation. The generator will compare the data from implementation tool validation tool, and generate correlation report based on user-specified rules. The primary customer of this tool is the ICC validation team in the company.
? Requirements:
1. Good programming skill
2. Fast-learning ability
3. Eager to study and Good communication skill
Nice to have (Not a must):
1. Perl, Python or other scripting language
2. Experiences in using IC Compiler
What Intern can learn:
1. Practice on EDA leading tools (PT, ICC).
2. Different industrial design styles
3. Basic digital implementation flow
4. Programming skills
Synopsys公司(Nasdaq: SNPS)是全球领先的电子设计自动化(EDA)软件工具领导厂商,为全球电子市场提供技术先进的集成电路(IC)设计与验证平台,致力于复杂的芯片上系 统(SoCs)的开发。同时,Synopsys公司还提供知识产权(IP)和设计服务,为客户简化设计过程,提高产品上市速度。Synopsys公司总部 设在美国加利福尼亚州Mountain View,有超过60家分公司分布在北美、欧洲、日本与亚洲。
Synopsys的产品遍及整个设计流程,让客户能够在从设计技术规格制订到芯片制作的全过程中使用统一的最佳技术。它的Galaxy? Design Platform和Discovery? Verification Platform向客户提供了用于先进的IC设计和验证的整套工具套件。
实习安排:
我们将从每年三月起接受学生的简历投递,通过严格的面试筛选,安排学生参加实习,实习周期为三个月,择优挑选可进入下一个实习周期。实习以项目为主,能接触到EDA (电子设计自动化)行业最前沿的技术,并能得到公司资深工程师的培训和指导,从中领略跨国美资企业的工作氛围与人文环境。
1. RD Engineer Intern for Database developing
1) Master/PhD candidate in Computer Science department, EE department or relative specialties.
2) Very strong C/C++/Java software development skills on Unix/Linux.
3) Very strong relational DB knowledge, including designing, implementing, optimizing and maintaining.
4) Very good at Computer Science fundamentals such as data structure, compiler theory, and operation system.
5) Had experience on complex software system, with strong problem solving skills and learning ability.
6) Good Chinese/English communication skill, good team player.
7) Highly motivated, committed and responsible to work, driven for quality,
8) Can work in office at least 3 days/week.
Nice to have:
1) Database design experience is a strong plus.
2) Application development based on the DB experience is a strong plus.
3) Knowledge of digital design, VHDL/Verilog is a good plus.
2. RD Engineer Intern of Deterministic Replay of Multi-threaded
The candidate will be working on a quite innovative project, which is to make multi-threaded program determinisitc. The work will be deployed to commercial large scale software product and make a great compact to the product.
The candidate should have:
a) Good knowledge of multi-threading.
b) Strong problem solving skills.
c) Good programming skills and self-motivated.
3. Validation RD of Database and Customer Issue Supporting
The ideal candidate should
have a basic understanding of the ASIC design flow;
is good at Perl or Tcl scripting;
has some basic knowledge on the commercial EDA tools like ICC is preferred.
He/she should have good communication skill and English skill, good learning capability and analytical skill.
4. RD for Improving GUI Manual Testing
This person will work within the quality assurance group for the Hercules/IC Validator Physical Verification (PV) product line. He or she will develop and deploy new GUI testing tools -- Tplan-Robot to improve ICV_VUE testing
Requirements:
-Familiar Unix/Linux environment
-Java programming capability
-High motivation to learn new skills and explore different technologies
-Good communication of English
-CS background
5. Job Description RD Engineer Intern of PRAG Program
a. Work with mentor to decide the structure of PRAG.
b. Implement Template Generator and Flow Generator with perl/python/tcl.
c. Assemble the two parts above to PRAG with user-friendly interface.
d. Complete the documentation of PRAG and demo to users.
Intern Requirement
a. At least 3 days to work per week.
b. Skilled at a script language like perl, python, tcl, etc.
c. Good communication skills
d. A good team player with high flexibility and responsibility.
6. Validator Performance Test Platform Upgrade
Job description:
The project is to build a new ICV Validator Performance Test Platform
The new platform is targeted to generate more detailed and vivid report and different aspects to track the latest performance feature in different aspects for quality endurance performance and qualification data reference.
Job Requirement:
1. Familiar with Linux/Unix system
2. Experience in Perl Programming is required
3. Experience in Perl CGI Programming is a plus
4. Good communication skills in both Chinese and English
7. RD Engineer Intern for testing platform developing
Intern’s job is to develop a testing platform in which combines input data selection, flow generation and report generation. Intern will also develop many Tcl scripts to auto-check the flow result. The platform will be targeted for daily feature testing job.
Requirements:
1. Good Digital Electronics background
2. Strong scripting skill
3. Self-learning skill and good communication skill
Nice to have (Not a must):
1. Tcl scripting language
2. Physical Implementation background
8. RD Engineer Intern for System Verilog data representation transforming
Job Description:
This candidate will be responsible for the complied SV design data representation translation for SV interface, modport, package, from VIR which is VCS data representation to VIF which is Leda data representation in order for Leda checker to run on. He or she will need to work with local team as well as global teams to achieve project goals.
Job Requirements:
- Hands-on experience with C/C++ programming
- Strong background in data structures and algorithms
- Working knowledge of HDL
- Strong communication skill, fluent in both spoken and written English
- Strong team work ethic and can-do attitude
- Knowledge of Linux, Tcl is definitely a plus
9. RD Engineer Intern of Language Check for Data Model
This candidate will be responsible for designing and developing new algorithms and prototypes. He or she will need to work with local team as well as global teams to achieve project goals.
Requirement
1. 2-year MS or PhD student in CS
2. Hands-on experience with C/C++ programming, familiar with STL
3. Education background in Program Analysis is a plus
4. Able to design algorithms and data structures, understanding of algorithm complexity is a plus
5. Team work ethic and can-do attitude
10. RD Engineer Intern for Power switch connectivity
Job Description:
Responsible for research and development of EDA tools in ASIC back-end flow, focusing on software development and methodology to reduce power-consumption in the cutting-edge flow of low-power chip design. Design and implement sophisticated algorithms to solve complex Multi-Voltage chip-design issues. Actively participating and advancing solutions based on IEEE Low Power Format.
Job Requirements:
1) Preferred student 2.5/3 yr in graduate school or right now for master/PHD degree with EE background.
2) Must have rich experience in the following CS fields:
a. Programming language (Shell, TCL, Perl)
b. Linux /Solaris Unix operating system
3) Strong desires to explore new technologies and able to demonstrate good learning and problem solving skills.
4) Good written and verbal English communication skills are necessary.
5) Self-motivated and good team working spirit.
6) Experience in EDA industry or IC design especially in back-end flow and / or low-power flow is a plus.
11. RD Engineer of new correlation generator
Description:
Static Timing analysis is used to verify the timing of the entire design before fabrication. Parasitic parameters are used in timing analysis to simulate the propagation of signals on wires. PrimeTime is a much powerful tool to validate timing violation of the entire design, although IC Compiler also provides smart and fast timing analysis. StarRC is one of important tool in parasitic extraction which provides much accurate resistance and capacitance. To valuating the performance of timing or RC extraction in IC Compiler, correlation with PrimeTime/StarRC from is the most efficient method in testing.
Intern’s job is to develop a correlation generator for both timing and RC correlation. The generator will compare the data from implementation tool validation tool, and generate correlation report based on user-specified rules. The primary customer of this tool is the ICC validation team in the company.
? Requirements:
1. Good programming skill
2. Fast-learning ability
3. Eager to study and Good communication skill
Nice to have (Not a must):
1. Perl, Python or other scripting language
2. Experiences in using IC Compiler
What Intern can learn:
1. Practice on EDA leading tools (PT, ICC).
2. Different industrial design styles
3. Basic digital implementation flow
4. Programming skills
公司介绍
Synopsys公司(Nasdaq:SNPS)是为全球集成电路设计提供电子设计自动化(EDA)软件工具的企业。为全球电子市场提供先进的IC设计与验证平台,致力于复杂的芯片上系统(SoCs)的开发。同时,Synopsys公司还提供知识产权和设计服务,为客户简化设计过程,提高产品上市速度。新思公司总部设在美国加州硅谷,有超过60家分公司分布在北美、欧洲、日本与亚洲。
Synopsys,Inc.[Nasdaq:SNPS],headquartered in Mountain View,California,creates leading electronic design automation(EDA)tools for the global electronics market.The company delivers advanced design technologies and solutions to developers of complex integrated circuits,electronic systems and systems on a chip.Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers.
Over the past several years,Synopsys has entered into partnerships with IBM,SGS-Thomson,SEMATEC,Toshiba and others to develop tools and design flows for complex IC and ASIC designs at 0.25 micron and below.The Company has also partnered with programmable logic vendors and other EDA companies to tackle issues ranging from the impact of complex silicon in programmable devices to sound design reuse strategies.
You'd better submit your resume via jobs-china@synopsys.com.
Synopsys,Inc.[Nasdaq:SNPS],headquartered in Mountain View,California,creates leading electronic design automation(EDA)tools for the global electronics market.The company delivers advanced design technologies and solutions to developers of complex integrated circuits,electronic systems and systems on a chip.Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers.
Over the past several years,Synopsys has entered into partnerships with IBM,SGS-Thomson,SEMATEC,Toshiba and others to develop tools and design flows for complex IC and ASIC designs at 0.25 micron and below.The Company has also partnered with programmable logic vendors and other EDA companies to tackle issues ranging from the impact of complex silicon in programmable devices to sound design reuse strategies.
You'd better submit your resume via jobs-china@synopsys.com.
联系方式
- 公司网站:http://www.synopsys.com
- Email:jobs-china@synopsys.com.Job
- 公司地址:上海市长宁路1027号,兆丰广场14-16楼
- 邮政编码:200050
- 联系人:Synopsys Recruiter