Device Engineering-Senior Technical Manager
长江存储科技有限责任公司
- 公司规模：5000-10000人
- 公司性质：国企
- 公司行业：电子技术/半导体/集成电路
职位信息
- 发布日期：2017-02-12
- 工作地点：武汉-江夏区
- 招聘人数：1人
- 工作经验：10年以上经验
- 学历要求：本科
- 语言要求：英语 熟练 普通话 精通
- 职位月薪：3-5万/月
- 职位类别：半导体技术 测试工程师
职位描述
职位描述：
Specific Responsibilities Include:
1. Handle ESD protection device development for multiple processes.
2. Handle ESD & Latch-up design rule definition and management, to ensure layout correctness, process margin and device performance.
3. Coordinate with layout team for ESD & Latch-up test-chip design and tape-out. Provide sample GDS and user guide for designer usage.
4. Handle ESD & Latch-up test-chip testing and debug for design rule verification.
5. Coordinate with design service team to support DRC deck creation for ESD & Latch-up rule checking.
6. Handle ESD & Latch-up DRC result review for customer’s product and internal test-chip.
7. Handle ESD circuit design support work for I/O library and product design.
8. Handle ESD & Latch-up failure analysis and circuit/layout improvement for multiple products.
Required Qualifications:
1. MS/PhD degree in Physics, Microelectronics, Electrical Engineering or equivalent;
2. In-depth knowledge of ESD protection device;
3. In-depth knowledge of circuit/layout design for ESD & Latch-up;
4. Experience of ESD & Latch-up testing and failure analysis;
5. Experience of process integration and devices in wafer foundry industries;
6. Experience with GDS layout tool (Cadence, Klayout etc.) and JDV;
7 .Demonstrated ability to communicate well with all levels of the organization.
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Specific Responsibilities Include:
1. Handle ESD protection device development for multiple processes.
2. Handle ESD & Latch-up design rule definition and management, to ensure layout correctness, process margin and device performance.
3. Coordinate with layout team for ESD & Latch-up test-chip design and tape-out. Provide sample GDS and user guide for designer usage.
4. Handle ESD & Latch-up test-chip testing and debug for design rule verification.
5. Coordinate with design service team to support DRC deck creation for ESD & Latch-up rule checking.
6. Handle ESD & Latch-up DRC result review for customer’s product and internal test-chip.
7. Handle ESD circuit design support work for I/O library and product design.
8. Handle ESD & Latch-up failure analysis and circuit/layout improvement for multiple products.
Required Qualifications:
1. MS/PhD degree in Physics, Microelectronics, Electrical Engineering or equivalent;
2. In-depth knowledge of ESD protection device;
3. In-depth knowledge of circuit/layout design for ESD & Latch-up;
4. Experience of ESD & Latch-up testing and failure analysis;
5. Experience of process integration and devices in wafer foundry industries;
6. Experience with GDS layout tool (Cadence, Klayout etc.) and JDV;
7 .Demonstrated ability to communicate well with all levels of the organization.
职能类别： 半导体技术 测试工程师
关键字： 器件研发, 3DNAND, Device Technology; Device Engineering
公司介绍
长江存储科技有限责任公司（YMTC）于2016年7月在中国武汉成立，是一家专注于3D NAND闪存芯片设计、生产和销售的IDM存储器公司。长江存储为全球工商业客户提供存储器产品，广泛应用于移动设备、计算机、数据中心和消费电子产品等领域。2017年，长江存储在全资子公司武汉新芯12英寸集成电路制造工厂的基础上，通过自主研发和国际合作相结合的方式，成功设计并制造了中国首批3D NAND闪存芯片。长江存储在武汉、上海、北京等地设有研发中心，通过不懈努力和技术创新，致力于成为全球领先的NAND闪存解决方案提供商。
联系方式
- 公司地址：东湖新技术开发区未来三路88号