深圳招聘

Job Title: Senior/Staff DFT Design Engineer
Department: Video
Location: Shanghai

Description:
- Block, IP and SoC level DFT implementation (bscan, scan, mbist, jtab, analog test structure, etc.)
- work with IP vendor (internal/external) to analyze DFT integation issues
- DFT STA, constraint generation, formal and timing closure
- DFT flow development and maintenance
- test vectors generation and verification
- interface to backend team on physical design and timing closure
- interface to test engineers on ATE and vectors bring-up and debug
- chip DFT quality sign-off

Qualifications:
Must have:
- minimum 4+/8+ years of DFT design and integration experience
- hands on DFT implementation experience (bscan, mbist, scan, IP testablity integration, at-speed
scan, IDDQ test, ATPG and fault simulation)
- expertise with DFT tools from Synopsy, Mentor, Syntest and Logic Vision
- strong logic design and verification backgroud solid experience in STA
- proficient in Perl, tcl and shell programming
- BSEE degree or equivalent
- good team work spirit
Nice to have:
- familiar with DTV/STB architecture, design, and IP
- proficient in C++ and system verilog
- MSEE degree or above

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

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