FPGA芯片设计工程师
爱德华光网络(深圳)有限公司
- 公司规模:50-150人
- 公司性质:外资(欧美)
- 公司行业:通信/电信/网络设备
职位信息
- 发布日期:2014-08-06
- 工作地点:深圳-南山区
- 招聘人数:1
- 工作经验:3-4年
- 学历要求:本科
- 语言要求:英语熟练
- 职位月薪:面议
- 职位类别:集成电路IC设计/应用工程师 IC验证工程师
职位描述
岗位职责:
1、参与FPGA需求规格制定,输出FPGA需求规格书
2、根据FPGA需求规格书,完成FPGA模块级设计, 芯片级设计,以及实验室联调;
3、负责FPGA需求规格书,代码,以及后端生成文件的归档与维护;
任职资格:
1、对FPGA器件结构、资源有深入了解;
2、4年以上FPGA开发经验,至少一次全程参与大规模FPGA芯片设计项目并产品化应用;
3、精通Altera/Xilinx,Mentor等公司FPGA开发环境及仿真调试工具;
4、精通Verilog HDL或System Verilog语言,精通时序约束、时序分析、时序优化方法;
5、熟悉通信行业以太网报文处理(PP)及流量管理(TM)的FPGA实现;
6、熟悉FPGA内嵌软核、硬核、操作系统者优先;
Responsibilities:
1.Be a team member for large complex multiple designer FPGA development efforts.
2.Write both module level and device level specifications in English.
3.Develop synthesizable RTL using System Verilog per module specifications.
4.Documentation for related tasks, also be responsible for document review, code inspection and other tasks required by quality process.
5.Work with hardware and software engineers in the integration of FPGA.
6.Provide input to the writing of System and Functional specifications of the products developed, i.e. be an active part in the early design phase of a product.
Customers (Internal & External)
1. System engineer
2. R&D in China and USA will be the main interfaces
3. PLM
4. Project manager
5. Quality
6. NPI
Personal Skills/Qualifications
1.Fluent written and spoken English
2.Familiar with FPGA design tools: Mentor Questa, Xilinx ISE, Altera Quartus, etc.
3.Broad knowledge base of telecommunication industry.
4.Understanding of European culture and ways of doing business.
5.Excellent interpersonal and communication skills.
6.Ability to create and maintain close working relationships as part of a team.
7.Ability to produce consistent quality under pressure.
8.Minimum 4 years working experience on FPGA design in data communication field, particularly Optical + Ethernet.
Success Criteria:
1.Good experience on Packet Processor/Processing and Traffic Management(TM).
2.Familiar with Network Processor architecture/implementation.
3.Good experience on MAC Interface design.
4.Good experience on Embedded Processor/CPU field.
1、参与FPGA需求规格制定,输出FPGA需求规格书
2、根据FPGA需求规格书,完成FPGA模块级设计, 芯片级设计,以及实验室联调;
3、负责FPGA需求规格书,代码,以及后端生成文件的归档与维护;
任职资格:
1、对FPGA器件结构、资源有深入了解;
2、4年以上FPGA开发经验,至少一次全程参与大规模FPGA芯片设计项目并产品化应用;
3、精通Altera/Xilinx,Mentor等公司FPGA开发环境及仿真调试工具;
4、精通Verilog HDL或System Verilog语言,精通时序约束、时序分析、时序优化方法;
5、熟悉通信行业以太网报文处理(PP)及流量管理(TM)的FPGA实现;
6、熟悉FPGA内嵌软核、硬核、操作系统者优先;
Responsibilities:
1.Be a team member for large complex multiple designer FPGA development efforts.
2.Write both module level and device level specifications in English.
3.Develop synthesizable RTL using System Verilog per module specifications.
4.Documentation for related tasks, also be responsible for document review, code inspection and other tasks required by quality process.
5.Work with hardware and software engineers in the integration of FPGA.
6.Provide input to the writing of System and Functional specifications of the products developed, i.e. be an active part in the early design phase of a product.
Customers (Internal & External)
1. System engineer
2. R&D in China and USA will be the main interfaces
3. PLM
4. Project manager
5. Quality
6. NPI
Personal Skills/Qualifications
1.Fluent written and spoken English
2.Familiar with FPGA design tools: Mentor Questa, Xilinx ISE, Altera Quartus, etc.
3.Broad knowledge base of telecommunication industry.
4.Understanding of European culture and ways of doing business.
5.Excellent interpersonal and communication skills.
6.Ability to create and maintain close working relationships as part of a team.
7.Ability to produce consistent quality under pressure.
8.Minimum 4 years working experience on FPGA design in data communication field, particularly Optical + Ethernet.
Success Criteria:
1.Good experience on Packet Processor/Processing and Traffic Management(TM).
2.Familiar with Network Processor architecture/implementation.
3.Good experience on MAC Interface design.
4.Good experience on Embedded Processor/CPU field.
公司介绍
爱德华光网络(深圳)有限公司是德国爱德华光网络公司的全资子公司。爱德华创立于1994年,致力于提供为全球客户提供通讯解决方案。经过二十多年的发展,爱德华产品系列已从单纯的存储网络连接方案扩展到以太网和骨干网的解决方案,近来公司进一步投资研发时钟同步技术、网络虚拟化技术,紧跟市场发展,不断创新,以满足用户不断变化的需求。目前,爱德华在全球23国家有设立37公司或分支机构,为全球250多家运营商以及10000+个企业客户提供服务。
随着业务发展,公司诚邀有志之士加入爱德华,共创相互连接、可持续发展的未来!
公司致力于致力于设计和提供有竞争力的员工福利,具体包含但不限于如下:
* 覆盖员工本人及家属商业医疗险、寿险
* 高比例住房公积金
* 高基数社会保险
* 丰厚年度绩效奖金
* 高于市场水平的带薪年假
* 年度团体员工旅游及拓展
* 各项在职培训计划
* 海外(如美国、德国、英国等)差旅访问及短期工作的机会
* 员工深圳户口招调计划
* 丰富业余体育活动(羽毛球、乒乓球、篮球、足球及跑步等)
* 员工重要活动及纪念日庆祝(生日、结婚和生育)
* 中国传统节假日庆祝
* 良好个人职业生涯发展机会
随着业务发展,公司诚邀有志之士加入爱德华,共创相互连接、可持续发展的未来!
公司致力于致力于设计和提供有竞争力的员工福利,具体包含但不限于如下:
* 覆盖员工本人及家属商业医疗险、寿险
* 高比例住房公积金
* 高基数社会保险
* 丰厚年度绩效奖金
* 高于市场水平的带薪年假
* 年度团体员工旅游及拓展
* 各项在职培训计划
* 海外(如美国、德国、英国等)差旅访问及短期工作的机会
* 员工深圳户口招调计划
* 丰富业余体育活动(羽毛球、乒乓球、篮球、足球及跑步等)
* 员工重要活动及纪念日庆祝(生日、结婚和生育)
* 中国传统节假日庆祝
* 良好个人职业生涯发展机会
联系方式
- Email:nma@advaoptical.com
- 公司地址:地址:span深圳市南山区海德二道茂业时代广场18楼