深圳招聘

Junior or Senior

Job Description:

1. Evaluate and test several of our state-of-the-art high-speed SOC products. These include high-frequency multi-gigahertz analog/mixed-signal chips, with significant performance issues, such as: channel cross talk, input-referred noise, phase noise, output bandwidth, power-supply noise, impedance matching;

2.  Occasionally (<10%) travel to test lab and customer locations, testing our chips in their labs;

3. Other tasks assigned by line manager.

Qualifications:

1. Bachelor's degree with minimum 3 years’ experience as FAE, IC designer, or test engineer.

2. Experience and understanding of impedance matching, noise processes, phase noise, multi-GHz performance.

3. Occasionally (20%) be willing to travel to test lab and customer locations, testing our chips in their labs.

4. Can read system datasheets, understand, and debug interactions between different blocks.

5. Desired: previous experience with basic IC design, PCB prototyping, IC testing.

6. Desired: High-level system programming, such as C/C++, python/Perl, LabView, Matlab.

7. Desired: Lab experience using oscilloscopes, signal/pattern generators, BERT, spectrum analyzer, AWG, BERT.

8. Preferred: Experience with high-speed optical testing, including BERT, eye mask, jitter, optical coupling, etc.

9. Preferred: Experience with interfacing with ATE and wafer-level testing/sorting. 

光梓信息科技（上海）有限公司是我国高速光电集成芯片领域内的领军企业之一。公司总部位于上海浦东新区张江高科园区内，由国家领军创新创业团队在国内外***风险投资的支持下创建。光梓科技致力于研发和产业化应用于数据中心、智能传感、5G数据传输的高速低功耗光电子集成芯片。公司利用具有自主知识产权和专利的全CMOS高速低功耗光电子芯片设计和制造技术，联合世界领先水平的研究单位和行业内的龙头企业，为快速增长的云计算大数据中心提供在性能、功耗、价格上都有极强竞争力的高性能核心芯片。