深圳招聘

Responsibilities:

? Create the DV test bench based on design spec from designer.

? Create test plan based on design features.

? Create test cases according to test plan.

? Generate DV coverage and improve with design.

? Work closely with architecture engineer as well as RTL designer the whole phase to develop new IP.

Requirements:

? Bachelor or master’s degree in Microelectronics, Electrical Engineering, Computer Science or relevant disciplines.

? Familiar with uvm and sv language, Verilog HDL language (know VHDL is a plus).

? Familiar with the flow of the IC design.

? Familiar with digital design EDA tools such as DC,PT,Formality.

? Have experience on IP simulation and debug process using VCS and Verdi.

? Having test experience on MCU controller design is a plus. 

? Have strong communication skills.

恩智浦半导体（纳斯达克代码：NXPI）致力于通过先进的安全连结及基础设施解决方案为人们更智慧安全、轻松便捷的生活保驾护航。作为全球领先的嵌入式应用安全连接解决方案领导者，恩智浦不断推动着互联汽车、端对端安全及隐私、智能互联解决方案市场的创新。恩智浦拥有超过60年的专业技术及经验，拥有29,000名员工，业务遍及30多个国家，2019年的营业额达88.8亿美元。