深圳招聘

职责描述：
1. Run schematic and layout simulations using tools like Spectre, HSPICE, AFS;
2. Perform analog simulations like noise analysis, loop stability, ac/dc/tran, monte-carlo analysis;
3. Work with circuit design engineers and system architects to write test plans, present results, and communicate clearly with designers and project leader;
4. Execute and develop verification workflows for design sign-off;

任职要求：
1. Engineering degree in an electronic or microelectronic field and 2+ years working experience in integrated circuits design or verification.
2. Understanding of basic analog building blocks and mixed signal blocks;
3. Hands on experience in Cadence Virtuoso tools;
4. Experience with behavioral modeling languages (Verilog, Verilog-A, Verilog-AMS, System Verilog) is a strong plus.
5. Experience with scripting languages like Python, PERL, TCL is a plus.

其他：
1. Good team player, attitude and thirst for continuous learning
2. Strong communication and interpersonal skills
3. Ability to function independently, be self-driven

光梓信息科技（上海）有限公司是我国高速光电集成芯片领域内的领军企业之一。公司总部位于上海浦东新区张江高科园区内，由国家领军创新创业团队在国内外***风险投资的支持下创建。光梓科技致力于研发和产业化应用于数据中心、智能传感、5G数据传输的高速低功耗光电子集成芯片。公司利用具有自主知识产权和专利的全CMOS高速低功耗光电子芯片设计和制造技术，联合世界领先水平的研究单位和行业内的龙头企业，为快速增长的云计算大数据中心提供在性能、功耗、价格上都有极强竞争力的高性能核心芯片。