深圳招聘

Job Description/Qualifications:

The NVIDIA Clocks group is looking for a top ASIC engineer with extensive experience in high-speed logic design and verification. In this position, you will have the opportunity to be responsible for the architecture, design, verification and physical design of complex clocking networks in large GPUs and SOCs. The complexity of clocking structures has grown substantially by supporting multiple high frequency clock domains as well as variety of DFT, power, noise, circuit, physical design features and constraints. In this position, you will have the opportunity to look ahead to future technologies and make tradeoffs at different levels of design abstraction to create novel and efficient clocking structures.

REQUIREMENTS:
- BS or MS (preferred) in EE, with a minimum of 2 years of relevant industry work experience
- Experience in RTL design (Verilog), verification and synthesis, STA
- Strong coding skills in Perl or other industry-standard scripting languages
- Understanding of sub-micron silicon issues like noise, cross-talk, and OCV effects
- Prior experience in implementing on-chip clocking networks is a plus
- Ability to interface with many groups

关于 NVIDIA-人工智能计算领域的领导者
从游戏到人工智能计算, 实践证明,GPU 能够非常有效地解决计算机科学领域中一些极其复杂的问题。GPU 一开始用作模拟人类想象力的引擎，创造出视频游戏和好莱坞电影中令人惊叹的虚拟世界。如今，NVIDIA GPU 用于模拟人类智力，运行深度学习算法，并在能够感知和理解世界的计算机、机器人和自动驾驶汽车中发挥大脑的作用。NVIDIA 的“AI 计算公司”名头越来越为人所知。
这正是我们毕生的工作 - 增强人类的想象力和智力。