深圳招聘

职位描述：
Physical Design Engineer
Department: SNDS
Primary Location : China-Shanghai-Shanghai
Job: Engineering - Hardware

Description
? Implementing from Synthesis to GDSII that includes synthesis/DFT implement and check/P&R/ timing signoff and physical signoff
? Cooperate with colleagues on power fixing based on power analysis result
? Develop methodologies to make daily work more efficient
? Cooperate with designers on RTL issues which relative to backend timing closure and congestion solve.
? Debugging the flow and completion it.
 
Qualifications
? BS/MS+ in EE/CS required
? Have DRC/LVS/ERC/Antenna debugging skills
? Knows Synopsys /Cadence place-and-route tool set and physical design project implementation.
? Good programming skill.
? Capable of writing Tcl or Perl.
? Familiar with synthesis, static timing analysis is an advantage.
? Familiar with RTL Design in Verilog is an advantage..
? Self-motivated team worker, good verbal and written communication skills in English.
? Two years relative work experiences are preferred. 举报 分享

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

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