深圳招聘

Position Description

1. Responsible for layout, floor planning, layout mask check and GDS tape out of RF IPD ICs.

2. Communicate with RF engineer and make sure manufacturability of designs.

3. Coordinate with supply chain management team and foundry to deliver wafer on time.

4. You will communicate and get directions from the RF design engineers to ensure high quality.

Position Requirements

1. Bachelor’s degree in electric engineering or related field.

2. Have at least two years of IC layout experience.

3. Basic knowledge of electric and wireless design.

4. Familiar with Linux.

5. Familiar with Cadence Virtuoso and Calibre DRC/LVS tools.

6. Experience with Virtuoso SKILL, EM simulation tools would be considered as a plus.

7. Good problem solving skill and team work spirit.

8. Good written English and oral English is a plus.

芯禾科技由业界专家创立于2010年，专注电子设计自动化EDA软件、集成无源器件IPD和系统级封装SiP微系统的研发。公司致力于为半导体芯片设计公司和系统厂商提供差异化的软件产品和芯片小型化解决方案，包括高速数字设计、IC封装设计和射频模拟混合信号设计等。这些产品和方案可以应用到智能手机、平板电脑和可穿戴等移动设备上，也可以应用到高速数据通信设备上。