Senior Design & Verification Engineer (Team Leader)
灿芯半导体(上海)有限公司
- 公司规模:150-500人
- 公司性质:外资(非欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2012-08-23
- 工作地点:上海-浦东新区
- 招聘人数:若干
- 工作经验:五年以上
- 学历要求:硕士
- 语言要求:英语熟练
- 职位类别:集成电路IC设计/应用工程师
职位描述
Senior Design & verification Engineer (For M0 Project)
Job Responsibilities
1.Have relative experience on the integration of ARM7,ARM9 or Cortex M0,M3
2.Have solid knowledge about the full-ahb,ahb lite,multilayer ahb
3.Have solid knowledge about UART,I2C,SPI,GPIO,Timer,Watchdog,PWM etc.
4.Build the whole chip validation environment and write the document to describe the usage
5.Be responsible for the whole chip’s integration and verification
6.Write test plan on whole chip including cpu,bus,peripheral
7.Write C test cases to validate whole chip including cpu,bus,peripheral
8.Work as team leader and responsible for resolving technique issues of the team
Job Qualification
1.CS or EE Master , 3+ years of relevant experiences
2.Verilog or VHDL , C language
3.Familiar with Perl/Shell/Makefile
4.Familiar with AHB, APB protocol
5.Experienced in ARM7,ARM9 or Cortex M0,M3 integration and verification
公司介绍
我们的事业前途极富竞争力,并提供良好的工作环境、优厚的福利待遇和广阔的个人职业发展空间。因业务发展需要,我们诚邀微电子、半导体及电子类相关专业人才加盟。
敬请递交详尽个人简历,对符合条件的候选人,公司会尽快安排面试,择优录用。
Brite Semiconductor was founded in 2008 in Shanghai's Zhangjiang Hi-tech district, and is a fast growing SoC and ASIC Design Company aimed at assembling the most optimum IP, foundry, test and packaging technologies to create custom silicon solutions for its customers. Brite is committed to delivering electronics solutions with leading edge North American technology, competitive pricing, uncompromising quality and a customer-centric approach to meet all of a customer's ASIC needs.
Brite utilizes the Open Model to provide flexible, direct, and cost effective designs that reduce a chip's time to market. Focused on the customer's needs, Brite's comprehensive customer support supplements turnkey spec-parts solutions, third party manufacturing service, product OEM solutions, and all other design service solutions. Brite's unique MAX technology lowers costs and maximizes yields for advanced 40/45 nm designs. With a proven track record of first time silicon success and the experience of over 200 tapeouts, Brite ensures minimum risk in both frontend and backend physical design, as well as test engineering, packaging and assembly, wafer fabrication, and production support to be our customers' ideal all inclusive ASIC partner
联系方式
- 公司地址:地址:span张江高科张东路1158号2号楼7楼