苏州招聘

JOB DESCRIPTION:
- Module-level architecture definition and design
- Module-level RTL implementation
- Simulation/Verification at both module level and system level
- Module-level synthesis and timing analysis
- Writing design spec and report
- FPGA/silicon debug on related modules

QUALIFICATIONS:
- MSEE with Minimum 2-year experience on digital IC design
- Solid knowledge on digital IC design
- Strong skills of Verilog RTL coding and simulation
- Hands-on experiences on EDA tools, such as Cadence and Synopsys tools
- Familiar with C language
- Relevant experiences on DDR2 control or video display are plus
- Hardworking and self-motivated
- A team player

公司介绍：
该公司是一家全球领先的模拟与混合信号芯片供应商，目前专注于为家庭娱乐和云计算市场提供以芯片为基础的全方位解决方案。 公司拥有非常完善的研发设计平台，其中包含了射频、模拟前端、数字信号处理以及高速接口等自主研发的功能模块，能够快速、灵活地进行模块化设计，研发出高性能、低功耗的芯片产品。

本公司为知名企业！