苏州招聘

模拟IC设计工程师

JOB DESCRIPTION:
-Oversee layout and verification activities which include floor plan, LVS and DRC.
-Design, evaluate and verify CMOS analog circuits.

QUALIFICATION:
-BSEE or MSEE.
- Good fundamental in analysis and design of analog / mixed-signal circuits.
-Experience in Verilog, AHDL and/or Matlab.
Experience in any of the following areas is preferred: PLL, high-speed I/O’s.
-Ability to do layout and provide verification/debugging guidance.
-Familiar with Computer languages such as C, C++, perl.
-Solid knowledge of EDA design tools. (Analog artist, spectre, HSPICE and nc-verilog ...)

Email：amychen.vision@gmail.com

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