苏州招聘

Job Title: MTS ASIC Logic Design Engineer

Responsibility:
? Develop micro-architecture for GPU blocks based on architectural requirement.
? Develop RTL code for GPU blocks in Verilog HDL and make sure functional correct and reusable for different configuration.
? Synthesis and deliver netlist that meeting timing, area and power requirement. Help PD on the floorplanning and close timing.
? Analyze gating efficiency report to improve RTL quality


Requirement:
? MS degree of EE with 5+ years working experience in ASIC Company.
? Expert of Verilog RTL design and has experience of large digital ASIC project.
? Familiar with front-end EDA tools and flows.
? Familiar with C/C++ programming and unix/linux and scripts (tcl, perl etc.)
? Fluent English on talking, presentation and writing documents.
? Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.
? Can solves complex, novel and non-recurring problems; initiates significant changes to existing processes/methods and leads development and implementation
? Possesses specialized knowledge of Computer architecture and computer arithmetic (a plus)
? Possesses specialized knowledge of Computer graphic knowledge (a plus)

AMD公司成立于1969年，总部位于美国加利福尼亚州桑尼维尔。AMD（NYSE: AMD）是一家创新的科技公司，致力于与客户及合作伙伴紧密合作，开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球，拥有约为12000名员工。