苏州招聘

We are currently looking for engineer who will be responsible for design verification of cutting edge GPU projects. Qualified candidate will participate in SoC level DFT/DFD logic verification jobs in both pre and post-silicon phases including:
1.SoC DV testbench and infrastructure development and maintenance
2.Create and execute SoC DFT/DFD testplan for logic including SCAN, Boundary SCAN, MBIST, Analog Macro, Debug Bus/Debug Widget, etc.
3.Implement directed and random testcase in C++/SV, as well as checkers and assertions
4.Doing coverage analysis and bug cleanup in regression
5.Participate in ATE bring-up, and deliver/debug the DFT patterns that will work on ATE

Requirement:
- MS with 3+years or BS with 5+ years experience in ASIC/SoC design verification
- Knowledge and hand-on experience of complex SoC DV flow from plan to coverage
- Strong C++/SV/Verilog development experience, familiar with scripting languages like Perl, Makefile, …
- Strong problem solving and communication skills
- Knowledge on DFT/DFD technology such as JTAG, SCAN, BSCAN, MBIST is preferred
- Good knowledge on verification methodologies like OVM/VMM is a big plus
- Experience in power verification is an asset

AMD公司成立于1969年，总部位于美国加利福尼亚州桑尼维尔。AMD（NYSE: AMD）是一家创新的科技公司，致力于与客户及合作伙伴紧密合作，开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球，拥有约为12000名员工。