Staff IC Design Verification Engineer - BIF
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2014-05-06
- 工作地点:上海-浦东新区
- 招聘人数:2
- 工作经验:三年以上
- 学历要求:硕士
- 语言要求:英语良好
- 职位类别:IC验证工程师
职位描述
Responsibilities:
For all stages of verification on next generation integrated processors (CPU + GPU + Multi Media), including developing testbenches, modeling, assertions/checkers/monitors, test plan & test development, regressions, and infrastructure development. Responsibility includes participating in the pre-silicon blocks, chip, multi-chip and system level verification on emulation platform.
Details:
1) building testbench, creating testplan, createing test and debugging for both IP and SOC level.
2) Apply necessary verification methodologies to ASIC design, such as coverage, assertion, randomization , etc to achieve the verification goals.
3) Regular communication via Audio/Video conference with teams in North America
Requirements:
1) Major in CS or EE and have Master degree or higher
2) A solid foundation of Computer Architecture and Operating system
3) Have complex ASIC/SOC Design Verification, direct experience in SOC or Processor (GPU or CPU) or Industry bus standard (PCI-e, AXI, AMBA) .
4) Good knowledge of Verilog/C/C++/SystemVerilog/UVM or VMM and debugging in Linux platforms.
5) Be skillful in shell/perl/tcl/Makefile programming in linux OS.
6) Good English hearing, speaking, reading and writing capabilities.
For all stages of verification on next generation integrated processors (CPU + GPU + Multi Media), including developing testbenches, modeling, assertions/checkers/monitors, test plan & test development, regressions, and infrastructure development. Responsibility includes participating in the pre-silicon blocks, chip, multi-chip and system level verification on emulation platform.
Details:
1) building testbench, creating testplan, createing test and debugging for both IP and SOC level.
2) Apply necessary verification methodologies to ASIC design, such as coverage, assertion, randomization , etc to achieve the verification goals.
3) Regular communication via Audio/Video conference with teams in North America
Requirements:
1) Major in CS or EE and have Master degree or higher
2) A solid foundation of Computer Architecture and Operating system
3) Have complex ASIC/SOC Design Verification, direct experience in SOC or Processor (GPU or CPU) or Industry bus standard (PCI-e, AXI, AMBA) .
4) Good knowledge of Verilog/C/C++/SystemVerilog/UVM or VMM and debugging in Linux platforms.
5) Be skillful in shell/perl/tcl/Makefile programming in linux OS.
6) Good English hearing, speaking, reading and writing capabilities.
公司介绍
AMD公司成立于1969年,总部位于美国加利福尼亚州桑尼维尔。AMD(NYSE: AMD)是一家创新的科技公司,致力于与客户及合作伙伴紧密合作,开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球,拥有约为12000名员工。
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦