IP Design Engineer
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2021-01-10
- 工作地点:北京
- 招聘人数:若干人
- 工作经验:5-7年经验
- 学历要求:本科
- 职位类别:集成电路IC设计/应用工程师
职位描述
IP Design Engineer
THE ROLE:
AMD NBIO (North Bridge IO) team delivers industry leading high-performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. NBIO global operates seamless from China, North America and Europe.
This is an exciting opportunity to join AMD’s NBIO team and work on IO-Hub IP development and deliver to all AMD’s product lines. In this position you will get opportunity to improve your design capability by learning from global engineering communities and making significant impacts to AMD’s business.
THE PERSON:
Candidate will work as Shanghai/Beijing IOHUB IP design engineer and work with global IOHUB team on cutting edge IP development. Candidate need to have solid IP design background and outstanding global communication skill.
KEY RESPONSIBILITIES:
- RTL design from block specification to RTL code implementation
- Block level power and area optimization
- Project execution and signoff
- Short term global travel upon business need
PREFERRED EXPERIENCE:
- Global company working experience, fluent oral English
- Complex IP Design, direct experience in IP/SoC is preferred
- Solid knowledge of high-speed IO knowledge (PCIe, USB) is highly preferred
- Solid background with ASIC design flow and multiple ASIC tape out experience
- Knowledge of low power design is required.
- Knowledge of System Management, Security and/or IO architecture & design is an asset.
- Must have excellent written and verbal communication skills
- Must excel in a dynamic team working environment
- Must be a self-starter and be able to independently drive tasks to completion
ACADEMIC CREDENTIALS:
· MSEE within 4-10 years, or BSEE within 6-12 years’ experience in digital ASIC/SOC design.
LOCATION:
Shanghai/Beijing
职能类别:集成电路IC设计/应用工程师
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦