SMTS IP Graphics Verification Engineer
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-11-28
- 工作地点:上海-浦东新区
- 招聘人数:若干人
- 工作经验:8-9年经验
- 学历要求:本科
- 职位类别:IC验证工程师 电子技术研发工程师
职位描述
Responsibility:
· Understand the design spec
· Develop test plan and write tests to verify DFT IP in IP level or SOC level
· Work with RTL designers and others to debug the failed tests
· Run verification related flows and fix issues
· Complete the verification target at each milestone
Requirement:
· Master with 8+ (or Bachelor with 10+) years working experience in ASIC area
· Solid experiences with simulation model creation and the testbench build
· Excellent knowledge of design verification methodology, such as OVM/UVM, SystemVerilog
· Advanced programming knowledge on C/C++, perl, Tcl/tk, Makefile
· Familiar with Linux Environment
· Candidate must have one or more of the following experience/knowledge: 1) Micro-processor (e.g. ARM) architecture and peripheral; 2) Popular on-chip bus (AMBA/AXI) or NOC; 3) low power design and verification methodology; 4) Standard IO IPs, including SPI/SMBUS/GPIO/I2C/I2S/UART; 5) DFT/JTAG, etc.
· C/C++ software development experiences is a plus
· Verilog programming skill is a plus
· Good communication skill and fluent English
· Good team player and strong sense of responsibility
· Strong problem solving skills
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦