苏州招聘

Responsibilities:

• SoC level DFT architecture definition.
• Cutting-edge test strategies study and implementation.
• Cutting-edge IP study (both DFT and non-DFT designs ) and test plan development.
• ATE/SLT yield analysis and root cause.
• Block and SoC level DFT implementation, including SCAN, MBIST, RTL integration, STA, etc.
• Plan/Implement block/chip level DFT RTL designs basing on FloorPlan.
• MBIST chip level plan, RTL insertion, verification and pattern generation.
• Develop high coverage and cost effective test patterns, and take part in ATE bring-up.
• Co-work with Front End and PD for synthesis optimization and smooth timing signoff.

                    

  

Requirements:

• Master degree with 5+ or Bachelor with 8+ years experience.
• Solid background on process, device or ASIC design.
• Proven knowledge and expertise on two or more fields of SCAN, MBIST, RTL design, STA and DV.
• Experience in Synthesis, formal/LEC, or power analysis will be a plus.
• Good command of two or more standard EDA tools, and has solid knowledge on state of the art test strategies.
• Strong programming and scripting skills in Perl or Tcl.
• Good communication skills (both English and Mandarin) and self-driven, willing to learn/share.

AMD公司成立于1969年，总部位于美国加利福尼亚州桑尼维尔。AMD（NYSE: AMD）是一家创新的科技公司，致力于与客户及合作伙伴紧密合作，开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球，拥有约为12000名员工。