Low Power Design Engineer
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-03-29
- 工作地点:上海-浦东新区
- 招聘人数:1人
- 工作经验:3-4年经验
- 学历要求:本科
- 职位月薪:2-3万/月
- 职位类别:半导体技术
职位描述
Job Responsibilities:
AMD GPU IP team delivers all GPU blocks which are kernel part of our dGPU and APU chips. You'll be working with AMD GPU local and global design teams to improve design’s logic and physical quality, power cases and power performance.
· Comprehend GPU’s architecture and consummate graphic IP’s power flow.
· Synthesis and deliver netlist that meeting timing, area and power requirement. Resolve formality, leda and CDC issue. Help PD on the floorplanning and close timing.
· Analyze clock gating efficiency report to improve RTL quality and optimize power.
Experience:
· Familiar with Verilog RTL design and has experience of digital ASIC project.
· Familiar with front-end EDA tools and flows.
· Familiar with C/C++ programming and unix/linux and scripts (tcl, perl etc.)
· Fluent English on talking, presentation and writing documents.
· Work is performed with limited supervision. Strong sense of task scheduling and deliver on time as predetermined milestones committed to manager.
· Have the experience of low power logic design or verification is a plus.
职能类别: 半导体技术
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦