苏州 [切换城市] 苏州招聘苏州电子/电器/半导体/仪器仪表招聘苏州集成电路IC设计/应用工程师招聘

ASIC design Engineer Power Performance

超威半导体(中国)有限公司

  • 公司规模:1000-5000人
  • 公司性质:外资(欧美)
  • 公司行业:电子技术/半导体/集成电路

职位信息

  • 发布日期:2019-03-29
  • 工作地点:上海-浦东新区
  • 招聘人数:若干人
  • 工作经验:8-9年经验
  • 学历要求:招若干人
  • 语言要求:不限
  • 职位类别:集成电路IC设计/应用工程师

职位描述

  • Understand the architecture of the graphics IP and functional block being designed
  • Build C/C++ model for simulation
  • Build test bench and monitors for DUT
  • Compose test plan and validation vectors to ensure functional completeness
  • Debug function/performance bugs of graphics IP
  • Work with global Front-End design team and physical design team for large scale ASIC chip physical implementation
  • Focus on physical design of deep sub-micron GPU chips including block level (full chip) floor planning, timing closure, place&route, physical verification etc

REQUIREMENTS:

  • Have in depth knowledge of entire design process from Design specification, defining architecture, micro-architecture, RTL design and functional verification, synthesis, Physical Design, Timing closure, Tape-out, and post-Si debug.
  • Have hands-on experience in Chiplevel Design/Integration activities.
  • Some Physical Design exposure required.
  • Perform Synthesis and netlisting tasks such as SDC Development, Scan Insertion, ECO implementation, Formal Verification, etc.
  • Some exposure to DFT is a strong plus.
  • Work with Physical Design team on Floor Plan, budgeting, timing closure, Signal Integrity, ECO flows, Power analysis, IO PAD placement, etc.
  • Should have expertise in: Cadence RTL Compiler, Design Compiler, PrimeTime, Conformal LEC. Good knowledge of datapath compilers is required.
  • Expertise in Perl and Tcl is a must.
  • Knowledge of chip bus interfaces such as AHB and various standard peripherals & interfaces is a plus.
  • Should be able to work closely with RTL Designers and Backend Physical Design teams across multiple sites.
  • Must have good communication & Analytical thinking skills.
  • Should have proficiency in flow development and scripting.
  • Should be able to Lead a team, and provide Technical mentoring and guidance to junior engineers.

EDUCATION:

Master with at least 5 years or Bachelor with at least 8 years working experience in ASIC area


公司介绍

AMD公司成立于1969年,总部位于美国加利福尼亚州桑尼维尔。AMD(NYSE: AMD)是一家创新的科技公司,致力于与客户及合作伙伴紧密合作,开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球,拥有约为12000名员工。

联系方式

  • Email:bella.yu@amd.com
  • 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦