IP Design Verification Engineer-PCIe
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-02-23
- 工作地点:上海-浦东新区
- 招聘人数:1人
- 工作经验:无工作经验
- 学历要求:本科
- 职位月薪:2-4万/月
- 职位类别:IC验证工程师
职位描述
Job Responsibilities:
AMD NBIO (North Bridge IO) team delivers industry leading high performance interconnects IP for all AMD products including dGPU, APU, Server and Game consoles. PCIe IP is one of the most important IP inside NBIO. The candidate will be working with the global team on PCIe IP verification
Responsibility:
* PCIe controller verification
* Work with architecture/IP designers to get a full deep insight on the design under test
* PCIe IP test bench build, verification component build
Education& Qualifications:
Candidate is preferred to be MSEE with minimum of 8 years, or BSEE with minimum of 10-year experience in digital ASIC/SOC design verification.
Experience:
1. Complex IP Design Verification, direct experience in IP/SOC or Processor (CPU or GPU) or Industry bus standard (PCI-e, HT) is preferred.
2. Good knowledge of at least one verification methodology. UVM is preferred
3. Good knowledge of Verilog/C/C++/System C/SystemVerilog.
4. Verification insights into random techniques.
5. Experience of verification lead is an asset.
6. Experience of PCIe verification is an asset.
7. Experience in power verification is an asset.
8. Verification of Virtualization is an asset.
9. Good at both Oral English and written English
10. Strong C and C++ software development and scripting languages (Perl, C Shell, Makefile, …) experience.
职能类别: IC验证工程师
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦