苏州招聘

Job Description and Requirements Description:
? Digital layout design for blocks and chips;
? RTL synthesis and static timing analysis;
? DRC&LVS checks;
? Timing Lib generation;
? Documentation of design procedures;
? Work towards improving efficiency in design procedures and methodologies;
? Communicate effectively with other team members.

Requirements:
? Knowledge of IC design/EDA tools, technical documentation, utilities;
? Shell/Perl/Python script language programming skill in Unix/Linux environment;
? Has strong desires to learn and explore new technologies and demonstrates good analysis and problem-solving skills;
? Must have a Bachelor degree in EE/CS; Master degree is a plus;
? Good English skills to work in an English language environment.

Synopsys公司（Nasdaq：SNPS）是为全球集成电路设计提供电子设计自动化（EDA）软件工具的企业。为全球电子市场提供先进的IC设计与验证平台，致力于复杂的芯片上系统（SoCs）的开发。同时，Synopsys公司还提供知识产权和设计服务，为客户简化设计过程，提高产品上市速度。新思公司总部设在美国加州硅谷，有超过60家分公司分布在北美、欧洲、日本与亚洲。
Synopsys,Inc.[Nasdaq:SNPS],headquartered in Mountain View,California,creates leading electronic design automation(EDA)tools for the global electronics market.The company delivers advanced design technologies and solutions to developers of complex integrated circuits,electronic systems and systems on a chip.Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers.
Over the past several years,Synopsys has entered into partnerships with IBM,SGS-Thomson,SEMATEC,Toshiba and others to develop tools and design flows for complex IC and ASIC designs at 0.25 micron and below.The Company has also partnered with programmable logic vendors and other EDA companies to tackle issues ranging from the impact of complex silicon in programmable devices to sound design reuse strategies.

You'd better submit your resume via jobs-china@synopsys.com.