Senior Analog Design Engineer
灿芯半导体(上海)有限公司
- 公司规模:150-500人
- 公司性质:外资(非欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2016-10-12
- 工作地点:上海
- 招聘人数:1人
- 学历要求:本科
- 语言要求:英语 熟练
- 职位月薪:1500-1999/月
- 职位类别:集成电路IC设计/应用工程师
职位描述
职位描述:
Job Requirements:
1. At least 3 or more years of analog circuit design experience with MS in EE or Physics (more senior levels will also be considered)
2. Willing to work as an active team player with group’s goal in mind.
3. Familiar with SPICE simulations including Monte-Carlo analysis
4. Strong knowledge in physical layout and component’s parasitic effects.
5. Knowledge with process and device physics is a plus
6. Acceptable communication skill in written and spoken English
Job Descriptions:
1. Will work on the following analog IPs but not limit to: ADC/DAC, LDO/DCDC, POR, BOR, Band-gap, various amplifiers, PLL/DLL and high speed interface design
2. Be responsible for schematic capture, simulation, test plan, DK generation and bench verification/characterizations.
3. Escort and instruct layout designers to complete physical implementations
4. Ensure database integrity before any release.
5. Execute any project assignment in the timing manner.
6. Follow company’s quality standards during any project execution.
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Job Requirements:
1. At least 3 or more years of analog circuit design experience with MS in EE or Physics (more senior levels will also be considered)
2. Willing to work as an active team player with group’s goal in mind.
3. Familiar with SPICE simulations including Monte-Carlo analysis
4. Strong knowledge in physical layout and component’s parasitic effects.
5. Knowledge with process and device physics is a plus
6. Acceptable communication skill in written and spoken English
Job Descriptions:
1. Will work on the following analog IPs but not limit to: ADC/DAC, LDO/DCDC, POR, BOR, Band-gap, various amplifiers, PLL/DLL and high speed interface design
2. Be responsible for schematic capture, simulation, test plan, DK generation and bench verification/characterizations.
3. Escort and instruct layout designers to complete physical implementations
4. Ensure database integrity before any release.
5. Execute any project assignment in the timing manner.
6. Follow company’s quality standards during any project execution.
职能类别: 集成电路IC设计/应用工程师
公司介绍
灿芯半导体(上海)有限公司成立于2008年7月是中国领先的纯设计代工服务公司,致力于为国内外集成电路厂商提供成套的解决方案。公司具备领先的设计能力,应用已被证明先进的设计流程和方法向客户提供可靠的、低成本的设计服务方案。灿芯的商业模式有别于传统复杂的ASIC芯片设计,它向客户提供的是一种简易、低成本和低风险的ASIC芯片发展和制造方法,已具备覆盖多家晶圆代工厂、封装测试厂及世界一流集成电路厂商的强大合作网络。基于迅猛发展的中国通讯、消费品及计算机市场,灿芯半导体正积极创建可喜成绩、迈进全新里程。
我们的事业前途极富竞争力,并提供良好的工作环境、优厚的福利待遇和广阔的个人职业发展空间。因业务发展需要,我们诚邀微电子、半导体及电子类相关专业人才加盟。
敬请递交详尽个人简历,对符合条件的候选人,公司会尽快安排面试,择优录用。
Brite Semiconductor was founded in 2008 in Shanghai's Zhangjiang Hi-tech district, and is a fast growing SoC and ASIC Design Company aimed at assembling the most optimum IP, foundry, test and packaging technologies to create custom silicon solutions for its customers. Brite is committed to delivering electronics solutions with leading edge North American technology, competitive pricing, uncompromising quality and a customer-centric approach to meet all of a customer's ASIC needs.
Brite utilizes the Open Model to provide flexible, direct, and cost effective designs that reduce a chip's time to market. Focused on the customer's needs, Brite's comprehensive customer support supplements turnkey spec-parts solutions, third party manufacturing service, product OEM solutions, and all other design service solutions. Brite's unique MAX technology lowers costs and maximizes yields for advanced 40/45 nm designs. With a proven track record of first time silicon success and the experience of over 200 tapeouts, Brite ensures minimum risk in both frontend and backend physical design, as well as test engineering, packaging and assembly, wafer fabrication, and production support to be our customers' ideal all inclusive ASIC partner
我们的事业前途极富竞争力,并提供良好的工作环境、优厚的福利待遇和广阔的个人职业发展空间。因业务发展需要,我们诚邀微电子、半导体及电子类相关专业人才加盟。
敬请递交详尽个人简历,对符合条件的候选人,公司会尽快安排面试,择优录用。
Brite Semiconductor was founded in 2008 in Shanghai's Zhangjiang Hi-tech district, and is a fast growing SoC and ASIC Design Company aimed at assembling the most optimum IP, foundry, test and packaging technologies to create custom silicon solutions for its customers. Brite is committed to delivering electronics solutions with leading edge North American technology, competitive pricing, uncompromising quality and a customer-centric approach to meet all of a customer's ASIC needs.
Brite utilizes the Open Model to provide flexible, direct, and cost effective designs that reduce a chip's time to market. Focused on the customer's needs, Brite's comprehensive customer support supplements turnkey spec-parts solutions, third party manufacturing service, product OEM solutions, and all other design service solutions. Brite's unique MAX technology lowers costs and maximizes yields for advanced 40/45 nm designs. With a proven track record of first time silicon success and the experience of over 200 tapeouts, Brite ensures minimum risk in both frontend and backend physical design, as well as test engineering, packaging and assembly, wafer fabrication, and production support to be our customers' ideal all inclusive ASIC partner
联系方式
- 公司地址:地址:span张江高科张东路1158号2号楼7楼