上海招聘

美资IC原厂招聘：

Sr. verification engineer

We are looking for Sr. Verification engineer with systemC/systemVerilog back ground. Past experience in video processing SOC verification is a plus.


Responsibilities:

Responsibilities will include developing verification environment; developing test plans for and verifying the function of ASIC; hands-on implementation work for every aspect of ASIC verification, working closely with the system group, architects, design and verification teams. The successful candidate should have experience going through at least one complete and successful ASIC design/verification cycle from architecting and creating ASIC test environment to full completion of the verification work. The candidate also needs to have a full understanding of design using Verilog and working experience with Systemverilog. A strong communication skill in both Chinese and English is required.


Qualifications:

4+ years of ASIC verification experience, complex SOC verification experence is preferred

good programming skills in C/C++

Knowledgeable in OVM or VMM, UVM is perferred

Responsible for implementation of verification environment and generation of high quality test cases.

BS/MS EE, CE or CS

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