Lead Product Validation Engineer-STA
Cadence(上海铿腾电子科技有限公司)
- 公司规模:150-500人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路 计算机软件
职位信息
- 发布日期:2015-07-17
- 工作地点:上海-浦东新区
- 招聘人数:2
- 工作经验:1年
- 学历要求:硕士
- 语言要求:英语熟练
- 职位月薪:面议
- 职位类别:集成电路IC设计/应用工程师
职位描述
Position Description:
1. Cadence ICD Product Validation Analysis Team mainly focus on STA and Low Power related area in digital design backend flow.
2. This position is responsible for developing, applying and improving quality standard
for Cadence Lower Power flow and Encounter common timing engine .
3.The candidate needs to test Low Power Solution and timing analysis result in
common and special usage flows.
Detailed Responsibility:
1.Identify Low Power solution and timing sign-off challenges in complex SOC designs and advacned process nodes
2.Proactively provide Low Power & STA & Sign-off development suggestions to R&D.
3.Build up Lower Power & STA & Sign-Off expertise and deliver support to field team and customers whenever needed.
4.Required to acquire expertise and ownership over existing product components as well as develop brand new product features.
5.Project leader on important Low Power or STA features.
Position Requirements:
1.Bachelor with 6 years related experience or Master with 4 years related experience in design house, FAB or EDA company.
2.Rich experience in IC design flow (front-end or back-end).
3.Experience in STA and SI analysis, or experience in Low Power flow, knowledge in parasitic extraction and signoff is a strong plus.
4. Good Unix System knowledge and script skill of TCL/TK/CSH/PERL.
5.Excellent capability of self-learning, problem solving skills;
6.Being proactive and self-motivated;
7.strong leadership;
8.Good written English and oral English is a strong plus
If you have interest, PLS send your update CV to zhangyl@cadence.com
1. Cadence ICD Product Validation Analysis Team mainly focus on STA and Low Power related area in digital design backend flow.
2. This position is responsible for developing, applying and improving quality standard
for Cadence Lower Power flow and Encounter common timing engine .
3.The candidate needs to test Low Power Solution and timing analysis result in
common and special usage flows.
Detailed Responsibility:
1.Identify Low Power solution and timing sign-off challenges in complex SOC designs and advacned process nodes
2.Proactively provide Low Power & STA & Sign-off development suggestions to R&D.
3.Build up Lower Power & STA & Sign-Off expertise and deliver support to field team and customers whenever needed.
4.Required to acquire expertise and ownership over existing product components as well as develop brand new product features.
5.Project leader on important Low Power or STA features.
Position Requirements:
1.Bachelor with 6 years related experience or Master with 4 years related experience in design house, FAB or EDA company.
2.Rich experience in IC design flow (front-end or back-end).
3.Experience in STA and SI analysis, or experience in Low Power flow, knowledge in parasitic extraction and signoff is a strong plus.
4. Good Unix System knowledge and script skill of TCL/TK/CSH/PERL.
5.Excellent capability of self-learning, problem solving skills;
6.Being proactive and self-motivated;
7.strong leadership;
8.Good written English and oral English is a strong plus
If you have interest, PLS send your update CV to zhangyl@cadence.com
公司介绍
Cadence 公司(Nasdaq股票代码:CDNS)成就全球电子设计技术创新,并在创建当今集成电路和电子产品中发挥核心作用。我们的客户采用Cadence的软件、硬件、设计方法和服务,来设计和验证用于消费电子产品、网络和通讯设备以及计算机系统中的尖端半导体器件、印刷电路板和电子系统。公司总部位于美国加州圣荷塞市,公司在世界各地均设有销售办事处、设计中心和研究设施,以服务于全球电子产业。
Cadence公司的电子设计自动化(Electronic Design Automation)产品涵盖了电子设计的整个流程,包括系统级设计,功能验证,IC综合及布局布线,模拟、混合信号及射频IC设计,全定制集成电路设计,IC物理验证,PCB设计和硬件仿真建模等。同时,Cadence公司还提供设计方法学服务,帮助客户优化其设计流程;提供设计外包服务,协助客户进入新的市场领域。全球知名半导体与电子系统公司均将Cadence软件作为其设计标准。
1992年Cadence 公司进入中国大陆及香港市场,迄今已拥有大量的集成电路及系统设计客户群体。在过去的十多年里,Cadence公司不断发展壮大,现拥有员工约400多人,建立了北京、上海、深圳、香港四个办事处以及北京研发中心、上海研发中心。
北京研发中心和上海研发中心主要承担与美国总部EDA软件研发任务,力争提供给用户更加完美的设计工具和全流程服务。位于上海的企业服务中心为用户提供高质量、有效的专业设计和外包服务。
把世界顶尖的产品和服务融入中国,成为中国电子行业最亲密合作伙伴,和中国电子高科技产业共同腾飞是Cadence 中国的坚定信念。
关于Cadence公司及其产品和服务的更多信息,敬请浏览公司中国网站 http://www.cadence.com.cn
Cadence公司的电子设计自动化(Electronic Design Automation)产品涵盖了电子设计的整个流程,包括系统级设计,功能验证,IC综合及布局布线,模拟、混合信号及射频IC设计,全定制集成电路设计,IC物理验证,PCB设计和硬件仿真建模等。同时,Cadence公司还提供设计方法学服务,帮助客户优化其设计流程;提供设计外包服务,协助客户进入新的市场领域。全球知名半导体与电子系统公司均将Cadence软件作为其设计标准。
1992年Cadence 公司进入中国大陆及香港市场,迄今已拥有大量的集成电路及系统设计客户群体。在过去的十多年里,Cadence公司不断发展壮大,现拥有员工约400多人,建立了北京、上海、深圳、香港四个办事处以及北京研发中心、上海研发中心。
北京研发中心和上海研发中心主要承担与美国总部EDA软件研发任务,力争提供给用户更加完美的设计工具和全流程服务。位于上海的企业服务中心为用户提供高质量、有效的专业设计和外包服务。
把世界顶尖的产品和服务融入中国,成为中国电子行业最亲密合作伙伴,和中国电子高科技产业共同腾飞是Cadence 中国的坚定信念。
关于Cadence公司及其产品和服务的更多信息,敬请浏览公司中国网站 http://www.cadence.com.cn
联系方式
- 公司网站:http://www.cadence.com.cn
- Email:cecilyl@cadence.com
- 公司地址:上海市浦东新区芳甸路1155号5楼(浦东嘉里中心)
- 邮政编码:201024
- 联系人:HR