上海招聘

Responsibilities:
? Lead a small group of engineers in validation and characterization of high speed digital, analog and mixed signal circuit blocks for Lattice latest FPGA products
? Review and influence new product design definition
? Develop and communicate validation and characterization plans to ensure high functional and performance coverage of product specs
? Bench work involving pre-silicon verification, test logic design, post-silicon validation and debug.
? Develop and debug lab automation and flows to enable rapid validation of new products.
? Summarizing product functionality and performance results in the characterization and validation report and reviewing results with internal groups.
? Evaluation of new products design functionality and performance to the target specification.
? Develop and improve validation methodology to maximize validation efficiency and accuracy
? Coach and mentor junior engineers
? Supporting internal and external customers on application issues for products released to production.

Qualifications:

Must have:
? BS, MS or Ph.D in Electrical Engineering.
? BS 8+ or MS 6+ years Design Engineering, Product-Test Engineering, Verification Engineering, Application Engineering or related semiconductor experience.
? At least 5+ year hands-on experiences on design and/or validation of high speed digital or analog circuits, such as PLL, Serdes, and Oscillator, are highly desired.
? Practical knowledge with high speed signal integrity simulation, measurement, and analysis
? Familiar with high speed lab equipment, such as pattern generator, oscilloscope and logic analyzer, used for analysis of semiconductor product performance and functionality.
? Solid theoretical knowledge of high speed digital and analog circuits
? Good team player. Able to coach and mentor junior engineers
? Good communication skills in both Chinese and English. Capable of conducting technical review clearly with overseas colleagues over the phone in English
? Good data analyzing skill and good documentation skill.

Preferred to have:
? Experiences with FPGAs are desired
? Experiences at RTL coding and test vector development are desired.
? Familiar with ATE (Automatic Test Equipment) programming is a plus.
? Experience with lab automation preferred.
? Programming experience with Python, Perl, C, or C++
? High level of PC skills with knowledge of MS Office Suite.

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