上海招聘

工作职责:
1. Responsible for package and PCB level SIPI simulation.
2. Responsible for bump map and ball map design.
3. Responsible for provide package and PCB layout guideline.
任职资格:
1. Basic background in SIPI methodology.
2. Fluent in one of the major SIPI simulation tool suites (Cadence, Ansys, ADS).
3. Basic understand one of major interface protocol (IEEE802.3, PCIE, DDR, etc.).
4. Understand package and PCB design flow, package and PCB layout skill will be a strong plus.
5. Strong English communication skills. (Both written & oral) and teamwork skills.
6. Actual product design and bring up experience with complex interface protocol and high power will be a strong plus
7. Scripting expertise (Perl, Tcl, or Python) will be a strong plus

关于灿芯半导体
灿芯半导体是一家提供一站式定制芯片及IP的高新技术企业，为客户提供从芯片架构设计到芯片成品的一站式服务，致力于为客户提供高价值、差异化的解决方案。

灿芯半导体的“YOU”系列IP和YouSiP（Silicon-Platform）解决方案，经过完整的流片测试验证，可广泛应用于5G、AI、高性能计算、云端及边缘计算、网络、物联网、工业互联网及消费类电子等领域。其中YouSiP方案可以为系统公司、无厂半导体公司提供原型设计参考，从而快速赢得市场。

灿芯半导体成立于2008年，公司总部位于中国上海，下设合肥、苏州、天津三家子公司，同时还在新竹和美国硅谷设立销售办事处，为全球客户提供全方位的优质服务。

About Brite Semiconductor
Brite Semiconductor is a leading custom ASIC and IP provider, and committed to provide flexible one-stop services from architecture design to chip delivery with high value and differentiated solutions.

Brite Semiconductor provides comprehensive silicon proven “YOU” IP portfolio and YouSiP (Silicon-Platform) solution, which can be widely adopted in 5G, AI, high performance computing, cloud and edge computing, network, IoT, industrial Internet and consumer electronics, etc. YouSiP solution provides a prototype design reference for system house and fabless to speed up the time-to-market.

Founded in 2008, Brite Semiconductor is headquartered in Shanghai, China with three subsidiaries in Hefei, Suzhou, Tianjin, and also has sales offices in Taiwan region and Silicon Valley.