上海招聘

Responsible for physical implementation of custom ASIC in advanced processes    

· Perform the following jobs or tasks:    

· Block level floorplan / SOC level floorplan    

· Clock tree synthesis    

· Place & Route    

· RC extraction    

· STA, timing closure    

· DRC/LVS/ERC clean up    

· Low power design    

· TCL/TK, CSH, Perl programing    

Qualifications:    

· Education: Bachelor or master degree, Electronics Engineering or Computer Science from a top university, 6+ relevant years experience preferred    

· 3+ years of industry experience on physical implementation on netlist 2 gds flow in 16nm or smaller process node    

· Willing to work in Nanjing branch office 

Good communication skill with English, strong analytical and problem solving skills    

· Innovus experience strongly preferred, highly experienced in congestion avoidance techniques    

· Positive, Active, Collaborative, Self-motivated

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