上海招聘

Job Summary:

Lattice Semiconductor is seeking for a product validation manager that possesses strong system validation technical expertise and excellent leadership skills to lead a fast-growing validation team. In this critical role, you will work directly with silicon architecture, verification, IP development, Marketing, the Business Units and occasionally external customers to develop and execute system-level validation and characterization for Lattice latest programmable products.
The primary objective of Product Validation Engineering group is to move New Programmable Logic Product Design's from first silicon to manufacturing release as quickly as possible in order to maximize our revenue. While speed of execution is important, it is equally critical that the results from the PV group's validation and characterization be of excellent quality.
The PV organization is intentionally structured to be in the critical path for New Product Release and has high visibility throughout the organization. As a result, The PV group needs creative, high energy and innovative individuals in order to execute the tasks required to meet our objectives!

Responsibilities:

- Supervise and mentor a group of product validation engineers and help manage their task assignments and career development
- Ensure the development of timely, cost effective system validation solutions
- Work closely with US design and product development teams for project review and delivery to meet product development milestones on time
- Collaborate with other product validation groups to grow the validation capabilities and drive cost efficiencies required for future products
- Plan validation methodology and validation system platform with Design engineering and customer requirements to ensure proper features are designed into the product
- Continuous benchmarking of test development and test result and maintain good documentation to improve validation flow/practice as well as product quality

Qualifications:

- BS or MS Degree in Electrical Engineering or equivalent experience
- 5+ year high speed telecommunication, video and/or other common system development
- 2+ years experiences on people management and/or leading technical team
- Must have hands-on experiences on design and bring-up of FPGA based systems. Be familiar with common high-speed protocols such PCIE, CPRI, SRIO, etc
- Hands-on experiences of common lab bench equipment and protocol analyzers
- Familiar with practical high-speed test techniques
- IC verification, validation, and/or test development experience is a strong plus
- Good leadership and communication skills in influencing peers and management
- Good decision making, problem solving abilities based on analytical approaches
- Experiences of summarizing technical plans and results through reports and presentations
- Results oriented in a multi project, international, cross-functional team environment
- Excellent English speak and listening skills. Must be capable of communicating projects, plan and issues clearly with US sites in English via teleconferences

Test Development Engineer

Shanghai, China

Job #: 10-0788

Please apply here: www.latticesemi.com.cn/careers

Job Summary

The primary objective of the Test Verification Engineering team is to drive product test cost and test quality during product development. Comprehensive manufacturing tests for new Programmable Logic devices are the primary deliverable of the team. The Test Verification team is part of the Product Development Engineering (PDE) group and is responsible for all aspects of manufacturing test development for Lattice products. The Test Verification team is active in every stage of product development to achieve excellent product test quality and ensure that product test cost is minimized. DFT feature definition, test methodology development, test pattern development and verification, coverage metrics and production test support are all within the team scope. Test Verification needs innovative and high energy individuals to execute the tasks required to meet our objectives. The knowledge and technical skills required to be a part of this team are broad. This position requires the candidate to have the ability to acquire new skills and expertise rapidly. Communication skills are critical, since the Test Verification team has key interactions with every other technical group in the company. The Test Verification team is required to work directly with Design, Applications, Characterization, Manufacturing, Quality and Reliability.

Accountabilities

• Responsible for development of ATE test patterns for new products to enable Sort and Class testing

• Develop methods for structural testing of new products

• Write and communicate test plans and schedules

• Implement and verify manufacturing patterns for new products

• Responsible for ensuring device testability and completing coverage analysis

• Identify potential testability issues during the product planning phase on new products and resolve with design before implementation in silicon

• Analyze structural coverage metrics to reach product coverage objectives

• Document device or software issues that affect device testability

• Responsible for automation of test pattern generation and coverage metrics

• Develop tools and methods for device testing

• Contribute to the development of structural coverage metrics

• Write test methodology documentation intended for company wide distribution

Qualifications

• BS or MS level Electrical Engineer

• 0 - 5+ years Test Development, Design Verification, or related Semiconductor experience

• Demonstrated ability to analyze and solve complex verification and circuit test issues

• Ability to rapidly learn and apply new technical skills in a broad range of disciplines from software to device architecture

• Strong PERL coding skills and experience (2-5 years)

• Proficient in HDL coding and Verilog modeling

• Familiar with DFT concepts and techniques

• FPGA, ASIC design experience or related course work

• Strong written and verbal communication skills

• High level of PC skills with knowledge of MS Office Suite

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