IO/ESD Design Engineer(IO/ESD设计工程师 )
灿芯半导体(上海)有限公司
- 公司规模:150-500人
- 公司性质:外资(非欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2020-12-25
- 工作地点:上海-浦东新区
- 招聘人数:若干人
- 工作经验:3-4年经验
- 学历要求:本科
- 职位月薪:1-2万/月
- 职位类别:集成电路IC设计/应用工程师 半导体技术
职位描述
Job Descriptions
1. Responsible for general purpose IO and ESD design.
2. Responsible for circuit design and verification, DK generation and test plan (including function, performance, ESD and latch-up).
3. Escort and instruct layout designers to complete physical implementations.
4. Assist FAE to solve customer’s application problems.
Job Requirements
1. Bachelor or above in Microelectronics, integrated circuits, electronic information technology and other related professional.
2. At least 3 years of IO and ESD design experience.
3. Good understanding in CMOS fabrication process, device physics, and ESD/Latch-up is a plus.
4. Familiar with analog design front-end EDA tools. Mixed-signal simulation is required. DK generation with SiliconSmart/Liberty and signal integrity simulation is a plus.
5. Good documentation skills.
6. Good communication skills and teamwork skills.
7. Active working attitude with self-motivation.
职能类别:集成电路IC设计/应用工程师半导体技术
公司介绍
我们的事业前途极富竞争力,并提供良好的工作环境、优厚的福利待遇和广阔的个人职业发展空间。因业务发展需要,我们诚邀微电子、半导体及电子类相关专业人才加盟。
敬请递交详尽个人简历,对符合条件的候选人,公司会尽快安排面试,择优录用。
Brite Semiconductor was founded in 2008 in Shanghai's Zhangjiang Hi-tech district, and is a fast growing SoC and ASIC Design Company aimed at assembling the most optimum IP, foundry, test and packaging technologies to create custom silicon solutions for its customers. Brite is committed to delivering electronics solutions with leading edge North American technology, competitive pricing, uncompromising quality and a customer-centric approach to meet all of a customer's ASIC needs.
Brite utilizes the Open Model to provide flexible, direct, and cost effective designs that reduce a chip's time to market. Focused on the customer's needs, Brite's comprehensive customer support supplements turnkey spec-parts solutions, third party manufacturing service, product OEM solutions, and all other design service solutions. Brite's unique MAX technology lowers costs and maximizes yields for advanced 40/45 nm designs. With a proven track record of first time silicon success and the experience of over 200 tapeouts, Brite ensures minimum risk in both frontend and backend physical design, as well as test engineering, packaging and assembly, wafer fabrication, and production support to be our customers' ideal all inclusive ASIC partner
联系方式
- 公司地址:地址:span张江高科张东路1158号2号楼7楼