上海招聘

Job Description      
As part of the SOC design team, the design engineer will mainly focus on following areas, but not limited to:
-Prepare micro-architecture specification for IP or subsystem design;
-RTL coding to verify against circuit implementation; Perform integration into SOCs.
-Maintain the 3rd party IP from vendor and verify functions by creating test cases.  
-Module level synthesize with sdc/upf; support chip level synthesis as IP owner.
-Assist with chip bring up and perform silicon functional/performance validation.
-Define timing and power specifications and identify timing solutions.
-Assist with backend team on perform place-and-route and timing analysis of modules

    

    

Job Requirement   
- Master’s degree with at least 5 years experience in digital design;
- Proven track record for successful design of IC products in the past.
- Good background in C, Verilog, SystemVerilog and verification methodology.
- Knowledge and experience with Python/Tcl and Unix/Linux Makefile scripting strongly desired.
- A high-level of self-motivation and a proactive approach to solving problems.

- Familiar with AMBA AXI/AHB/APB spec.
- Familiar with the frontend ASIC design methodology/flow

Solid knowledge in one of the following area is a plus:
-SoC power management unit design；

-SoC clock & reset controller design;

-Knowledge of ARM GIC/SMMU architecture;
-Knowledge of ARM Coresight component integration;

-Knowledge or design experience of GPU/VPU/DPU;

-Knowledge or design experience of PCIE/USB/Ethernet/UFS/eMMC;

Siengine，芯擎科技，
是一家中外合资高科技公司，主要股东有亿咖通中国有限公司，安谋科技（中国）有限公司（ARM China）。亿咖通中国有限公司是吉利集团战略投资独立运营的全资子公司。
Siengine致力于为汽车产业的未来发展提供技术先进的SOC解决方案，并成为一家全球化的高科技公司。
我们在北京、上海、武汉有运营办公室。