DRAM Design Verification Engineer
长鑫存储技术有限公司
- 公司规模:1000-5000人
- 公司性质:民营公司
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-10-12
- 工作地点:上海-长宁区
- 招聘人数:若干人
- 工作经验:10年以上经验
- 学历要求:本科
- 职位类别:半导体技术
职位描述
As a DRAM Design verification Engineer, you will work with design team using the state of art technology to design and verify digital/analog circuitry used in advanced memory products. You will participate in developing digital/analog mix-signal verification methodology for advanced memory products. You will design and develop the verification environment, test stimulus using digital and analog simulation tools.
Responsibilities
1.In charge of full-chip level/block level circuitry design verification.
2.Develop verification platform includes test bench and regression system creation.
3.Develop behavior model, assertions/checker/monitor based on the memory architecture and functionality.
4.Build test plan and verify the functionality of design, run coverage and regression, analyze coverage gaps and diverse strategy to fill coverage holes.
5.Provide support to design team for circuitry debug.
Requirements
1.Basic knowledge and understanding of CMOS circuitry design.
2.Familiar with EDA design tools such as Spectre, finesim, Virtuoso, verilog etc.
3.Experience in UVM, SystemVerilog, VPI/PLI, assertion coding preferred.
4.Experience in LPDDR4 DRAM product verification would be a plus.
5.Good team player and communication skills.
6.Good learning competency, self-motivated in a flexible and dynamic environment.
Education
A Bachelor or Master in Electrical Engineering or related discipline
职能类别:半导体技术
公司介绍
公司尤其重视人才,国际化的管理平台制定了一系列人才激励机制,为员工提供完善的培养及快速晋升通道,以及具有市场竞争力的薪酬福利待遇:股权激励、五险一金、带薪年假、补充医疗保险、驻厂医疗服务、提供员工宿舍、租房津贴、购房补贴、城际交通补贴、餐补及工作餐、覆盖市区的通勤车、年度员工体检、节假日礼品礼金、丰富的员工活动以及团队建设活动、新人培训、和业内专家共同工作。
公司声明:长鑫存储技术有限公司始终遵循国家、地方政府及行业通用规则执行招聘、录用及员工晋升。我们致力于以平等、公平为原则,对待每一位求职者及员工,绝不因国籍、残疾、怀孕、相貌、信仰、政治立场、团体背景、婚姻状况等任何原因做出歧视性决定或行为。同时,长鑫坚决禁止使用童工,也绝不向求职者收取任何招聘或其他非法费用。
联系方式
- 公司地址:经济开发区空港开发区天柱山大道388号 (邮编:230000)
- 电话:16655104258