上海招聘

Job Descriptions

Work closely with hardware/software architects on ESL design of AI hardware.

Build the models for architecture exploration and virtual prototyping, conducting simulations, and explore multiple algorithmic and architecture options to find the optimal designs considering power/performance/area/cost tradeoffs

Collaborates ASIC/FPGA engineers and software engineers for proof of concept and performance evaluation

Minimum Requirements

M.S. in Computer Science, Computer Engineering, or Electrical Engineering (or a closely related field of study) plus 3 years of experience.

At least 2 years of work experience in ELS design or hardware modeling with SystemC/C/C++

Knowledge of RTL coding, scripting language, Unix/Linux development environment 

Preferred Qualifications

Knowledge of machine learning, deep learning, and other AI algorithms

Familiarity with Synopsys ELS design tools

Familiarity with IC/FPGA design and verification environment and methodology

Knowledge of IC design flow, HW bring-up

Familiarity with ARM or RICS-V architecture and assembly 

Strong written and verbal communication skills

Processor IP design Engineer

 We are a team working on producing the highly optimized hardware IP for the ARC family of 32-bit configurable processors. We are looking for an engineer like you to be part of the team to work on our world-class micro-processors that allow our customers develop highly optimized and very sophisticated embedded designs.   Responsibilities - To define (micro)architecture specification and implement RTL design of microprocessors - To optimize designs for performance, speed, size and power - To work closely with verification team and contribute to verification strategy and help in debug fails - To provide technical leadership to a team of CPU hardware design engineers Requirements - A minimum of 5-8 years of experience in ASIC design - Deep knowledge and experience in RISC microprocessor architecture - Hands-on experience in multi-core, cache coherency is a big plus - Excellent grasp of RTL design (Verilog or VHDL) - Good understanding of design for synthesis to achieve specified power, frequency, and area targets - Familiar with EDA tools such as, VCS, VERDI, SPYGLASS, etc. - Good knowledge of programming at assembly and C/C++ level - Excellent communications skills in English - Good demonstration of enthusiasm, drive and diligence - Keen to work in a multi-site global development team

 

公司信息
关于Synopsys新思科技公司（Synopsys, Inc.，纳斯达克股票市场代码：SNPS）提供各种产品和服务来加速全球电子市场中的创新。作为电子设计自动化（EDA）和半导体知识产权（IP）领域内的领导者，Synopsys的完整的、集成化的产品组合覆盖了系统级设计、 IP、设计实现、 验证、 制造、光学设计 、软件开发测试和现场可编程门阵列 (FPGA)等解决方案，可帮助设计师解决所面临的各种关键挑战。这些技术领先的解决方案可帮助Synopsys的客户建立竞争优势，既可以使***的产品快速地上市，同时降低成本和进度风险。

Synopsys一直是加速电子技术创新的中流砥柱，被广泛使用的Synopsys技术成功地设计并创造了数十亿的芯片和系统。公司的总部位于美国加利福尼州山景城（Mountain View，California），并且在北美、欧洲、日本、亚洲和印度设有约90个办公室。近年来，Synopsys先后收购了世界领先的软件开发测试验证工具厂商Coverity与主动性安全解决方案供应商Codenomicon等一系列公司，将公司的领先技术进一步拓宽到了软件质量与安全等领域。

Synopsys 不仅为员工（正式）提供有竞争力的薪资，并根据各地具体情况提供完善的福利保障。主要福利可能包括：
- 五险一金
- 补充公积金、住房津贴
- 午餐、交通津贴
- 员工补充医疗保险、双子女医疗保险、配偶医疗保险计划
- 股权激励计划
- 全面健康管理、健身活动
- 每年18-26天带薪休假

期待您加入Synopsys，请将简历发送至 jobs-china@synopsys.com (社招) / campus@synopsys.com (校招), 并请关注 Webchat (微信：Synopsys 招聘)。

更多信息， 请访问公司网站：***********************