VLSI CAD Engineer
英伟达半导体(深圳)有限公司
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2012-08-29
- 工作地点:上海
- 招聘人数:5
- 学历要求:本科
- 职位类别:电子工程师/技术员
职位描述
RESPONSIBILITIES:
- Develop the physical design methodologies and flow automation for all chips of NVIDIA (including GeForce®/Tegra™/Tesla™/Quadro™)
- Evaluate and help to improve third party tools including Synopsys (ICC/STAR-RC/PT/ICV), Cadence (SOCE), Magma (Talus/Mojave), Mentor Graphics (Pinnacle/Olympus)
- Develop internal tools and solutions
- Support the global physical design implementation team
Minimum Requirement:
- BS in CS/EE/ME
- Prior experience in one of the following areas: floorplan, Place&Route, STA, layout DRC/LVS, DFT, circuit design, RTL
- Strong experience in programming
Preferred Requirement:
- Proficiency in Perl, TCL, Shell and Makefile scripting
- Web programming experience like PHP/CGI or etc
- Experience in VLSI physical design implementation and automation and methodology
-Experience in EDA tools: Magma (Blast, Talus), Synopsys (ICC/DC/PT/STAR-RC/Astro/PC), Cadence (SOCE), Mentor Graphics (Pinnacle/Olympus), Atoptech
- Experience in 40nm and 28nm IC design
- Circuit level comprehension of timing critical paths and Spice experience
工作内容:
· 负责NVIDIA公司所有芯片物理设计的流程开发及其自动化
· 评估并改进第三方EDA工具,包括Synopsys (ICC/STAR-RC/PT/ICV), Cadence(SOCE), Magma(Talus/Mojave), Mentor Graphics(Pinnacle/Olympus)
· 开发内部EDA工具及提出解决方案
· 为全球物理设计团队提供技术支持
基本要求:
· 计算机、电子工程或微电子专业本科生或硕士生
· 有以下一项相关经验:芯片规划,布局布线,静态时序分析,DRC/LVS, DFT,电路设计, RTL
· 有较强的编程能力
优先条件:
· 熟练掌握Perl,TCL,Shell,Makefile
· 网页编程经验,如PHP,CGI等
· 有IC物理设计及流程开发经验
· 有下列EDA使用经验:Magma (Blast, Talus), Synopsys (ICC/DC/PT/STAR-RC/Astro/PC), Cadence (SOCE),
· 有40nm,28nm芯片相关设计经验
· 对时序有及深入理解并有SPICE经验