FPGA设计工程师
聚领信息技术(上海)有限公司
- 公司规模:50-150人
- 公司性质:外资(欧美)
- 公司行业:计算机软件
职位信息
- 发布日期:2012-08-23
- 工作地点:上海-徐汇区
- 招聘人数:若干
- 工作经验:二年以上
- 学历要求:本科
- 语言要求:英语良好
英语良好 - 职位类别:高级硬件工程师 硬件工程师
职位描述
工作职责(Responsibilities):
The design engineer need to be familiar with system, own chip architecture, functional spec, write detail design spec and/or verification plan, RTL coding and/or testbench coding, write testcase, run FPGA synthesis and backend, and be able to test and debug chip in lab, be responsible for design quality.
职位需求(Requirement):
Requires MSEE/CS or BSEE/CS degree equivalent, plus significant experience in logic/HW design (5+ years).
Programming using script language (such as unix shell, Perl, Tcl, Makefile etc)
Experienced on VerilogHDL, RTL coding and/or basic SystemVerilog/Vera programming
Experienced on FPGA design tools, flow, FPGA structure, vendor related IP generation and usage, synthesis and timing, FPGA backend.
Experienced on FPGA debugging using ChipScope or SignalTap, logic analyzer or oscillograph
Experienced on timing analysis
Be familiar with design and simulation related EDA tools
Be familiar with Unix/Linux based design environment
Experienced on lab debugging, know basic of board design
Basic knowledge of OOP programming
Could work closely with HW designer to design and debug a HW system, include reset, clock, CPU and memory interface related pin assignment, and measure signals in lab.
Experienced in digital signal processing, e.g. DFT, FFT
Be familiar with digital communication system: modulation & demodulation, carrier phase, timing and bit synchronization, channel encoding and decoding, equalizer
Good background in signal & system, like spectrum analysis, Fourier transform, etc
Open mind, good communication skill and team work
Passion on designing new system independently.
The design engineer need to be familiar with system, own chip architecture, functional spec, write detail design spec and/or verification plan, RTL coding and/or testbench coding, write testcase, run FPGA synthesis and backend, and be able to test and debug chip in lab, be responsible for design quality.
职位需求(Requirement):
Requires MSEE/CS or BSEE/CS degree equivalent, plus significant experience in logic/HW design (5+ years).
Programming using script language (such as unix shell, Perl, Tcl, Makefile etc)
Experienced on VerilogHDL, RTL coding and/or basic SystemVerilog/Vera programming
Experienced on FPGA design tools, flow, FPGA structure, vendor related IP generation and usage, synthesis and timing, FPGA backend.
Experienced on FPGA debugging using ChipScope or SignalTap, logic analyzer or oscillograph
Experienced on timing analysis
Be familiar with design and simulation related EDA tools
Be familiar with Unix/Linux based design environment
Experienced on lab debugging, know basic of board design
Basic knowledge of OOP programming
Could work closely with HW designer to design and debug a HW system, include reset, clock, CPU and memory interface related pin assignment, and measure signals in lab.
Experienced in digital signal processing, e.g. DFT, FFT
Be familiar with digital communication system: modulation & demodulation, carrier phase, timing and bit synchronization, channel encoding and decoding, equalizer
Good background in signal & system, like spectrum analysis, Fourier transform, etc
Open mind, good communication skill and team work
Passion on designing new system independently.
公司介绍
polylink集团(英文名为:polylink holdings, inc.s. 简称polylink)是一家致力于ip语音和视频通讯方案研发、销售和运营的集团企业。1995年正式成立,在中国、印度、北美和欧洲地区均拥有精英型的技术与商务队伍,不断汲取和探索通讯业的最新发展动向,融入到新产品的开发中,其产品和服务主要应用于国内外集团企业、电信运营商、广电运营商、虚拟运营商等行业的通讯业务中。polylink在为客户提供国际领先的产品和技术的同时,还为客户提供完善的售后服务体系,零距离的服务也时刻为提高客户的运营效率而无时无刻的体现。
为更好地推动中国市场特别是通信技术的发展,为中国通信业务向ngn推进做贡献,目前 polylink 集团公司在中国已成立了"聚领信息技术( 上海 )有限公司"和"上海网诺通讯技术有限公司( www.netpromise.net )"两家子公司。追逐和创造voip领域的***,为通信业务向ngn 和ims时代推进做贡献。
公司团队的工作准则是:将客户的需求与世界***的技术结合起来,创造***的通信解决方案。我们致力于构筑这样一个通讯业的风景:全球化又不失个性化、兼容性强但又容易控制、私密度高却又开放性强。在这样的通讯世界里,性能、智能和规模将能够被同时兼顾,再也不必顾此失彼。聚领正努力成为行业公认的通信解决方案提供商中的领先者,这些解决方案将支持高性能和高智能的网络,并且始终站在行业前沿,成为推动通信和信息行业不断革新的动力。
公司拥有一批由管理、商务和技术精英组成的优秀团队,团队成员始终坚信客户的成功就是我们的成功,将以高度的敬业精神,敏锐的洞察力,科学严谨的态度,不断探索,以己所长并虚心不断汲取借鉴其它优秀理念,通过不懈地努力进行科技创新,为客户推出国际一流的技术和服务。
为更好地推动中国市场特别是通信技术的发展,为中国通信业务向ngn推进做贡献,目前 polylink 集团公司在中国已成立了"聚领信息技术( 上海 )有限公司"和"上海网诺通讯技术有限公司( www.netpromise.net )"两家子公司。追逐和创造voip领域的***,为通信业务向ngn 和ims时代推进做贡献。
公司团队的工作准则是:将客户的需求与世界***的技术结合起来,创造***的通信解决方案。我们致力于构筑这样一个通讯业的风景:全球化又不失个性化、兼容性强但又容易控制、私密度高却又开放性强。在这样的通讯世界里,性能、智能和规模将能够被同时兼顾,再也不必顾此失彼。聚领正努力成为行业公认的通信解决方案提供商中的领先者,这些解决方案将支持高性能和高智能的网络,并且始终站在行业前沿,成为推动通信和信息行业不断革新的动力。
公司拥有一批由管理、商务和技术精英组成的优秀团队,团队成员始终坚信客户的成功就是我们的成功,将以高度的敬业精神,敏锐的洞察力,科学严谨的态度,不断探索,以己所长并虚心不断汲取借鉴其它优秀理念,通过不懈地努力进行科技创新,为客户推出国际一流的技术和服务。
联系方式
- 公司地址:地址:span徐汇区漕宝路650号1栋1402