南京招聘

Description:

- IC design implementation from RTL to netlist including synthesis, timing constraint composing, timing eco, design for test

- IC physical implementation from netlist to GDSII, including floorplanning, power grid implementation, place and route clock tree synthesis, timing eco, design closure, flip-chip design

- IC design verification including timing analysis, timing signoff, formal verification and low power verification.

- Develop Perl/TCL/Shell scripts to enhance IC physical design flow and methodology.

Qualifications:

- BS/MS in ME, EE or CS.

- 5+ years of hands-on experience in IC design industry.

- Some experience and knowledge on process, parameters, synthesis, timing analysis, placement, routing, CTS, SI, power calculation, custom layout, timing analysis, DRC/LVS.

- Familiar with EDA tools, such as ICC2/INNOVUS

- Positive, active, self-motivated team worker, good verbal and written skills in English;

- Real tape-out experience;

- DFT, synthesis, formal related experiences is a good plus;

- Experiences on Cadence, Synopsys, Mentor and etc. 

上海安路信息科技股份有限公司，创立于2011 年11 月，是国内知名的集成电路设计企业。公司具备FPGA芯片硬件和FPGA编译软件自主研发能力，支持从硬件到软件的全流程、定制化服务。

主营业务： 现场可编程逻辑器件芯片（Field Programmable Gate Array，FPGA）及配套开发软件工具的研发与销售。公司出品的高性能SALPHOENIX？系列、SALEAGLE？系列和SALELF？系列，以精良的品质成功应用于工业控制、消费电子、数据中心、网络通信等领域。

安路科技根植中国，面向世界，努力成为国际一流的FPGA芯片供应商。芯无止境，超越未见，安路科技助力构建灵活自主、技术创新的世界，带您走向更美好的未来。