南京招聘

Job Responsibilities：

• Solid knowledge on DFT design, including JTAG, IEEE1500, MBIST and ATPG；
• Basic knowledge of ASIC/SOC design flow, including coding, simulation, verification, synthesis and STA；
• Familiar with TetraMAX , DFT Compiler tool；
• Verilog coding experience；
• Perl, TCL, Makefile coding experience；
• Good English read&write skill and team work；
• Fast learning and hard working。

• MSEE with minimum of 6 years/or BSEE with minimum of 8 years experiences in digital ASIC/SOC design verification； 
• Design for Test (DFT) RTL design and coding quality (CDC/LEDA) improvement；
• Implement basic DFT schemes, including scan insertion, boundary scan, Mem BIST,DRC clean, ATPG and pattern simulation；
• Develop the high coverage and cost effective test patterns；
• Support synthesis owner to fix DFT related netlist issues；
• Support other teams for DFT related problems (such as ATE patterns debug)；
• Participate in SoC level DFT architecture definition；
• Work with architect and designer to develop test plan；
• It is a must that the candidate has one or more of the following experience/knowledge, such as ARM/8051 architecture, AMBA(AXI/AHB/APB) bus, USB(3.0/2.0/1.1; HSIC/host/device/OTG) system, NAND Flash host controller/BCH/double-data-rate interface, PCI-E/PCI bus, low power design, clock generation and control, SD/eMMC host controller, SATA/SAS, Legacy IPs (SPI/SMBUS/ACPI/LPC/GPIO), General connectivity IPs (I2S/I2C/UART), Ethernet, JTAG, etc。

成立于2019年12月，总部位于中国苏州；
我们的产品是车规级处理器芯片，主要应用于汽车电子各应用领域，包含车身电子，动力系统与底盘控制，仪表盘与信息娱乐系统，汽车网关等，以及高可靠性要求的工业控制领域；
核心团队来自世界知名汽车半导体公司，拥有完整的汽车MCU产品定义、芯片研发、软件及方案开发、市场营销20年实践经验；
致力于为实现车规芯片国产化做出大的贡献。


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考勤：弹性考勤
电话：+86 512 65008818
城市：合肥/苏州/南京/上海/天津

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