南京招聘

Job Summary

• Define and implement block level verification flow, testplans, testbenches and sign-off.
• Take ownership of functional and code coverage for block level verification.
• Experience of porting block level verification environment to full-chip/SoC level.

Responsibilities

• Build block level testbench using SystemVerilog and UVM based methodology.
• Define and implement block level testplan, testbench and testcases.
• Review and enhance verification methodology for block level verification.
• Work closely with ASIC design team to build register verification testbench for all chip blocks.

Qualifications

• BS in Computer / Electrical Engineering with 12+ years of experience.
• Must have experience with working on multiple chip verification projects.
• Hands-on experience with block/Full-chip/SoC level verification using SystemVerilog/UVM.
• Experience with Ethernet, DDR or PCIe verification is preferable.
• Experience with 802.11 Wireless MAC is plus.

Experience with RTL Verification & Debug 

Fairchild Semiconductor是目前世界上在高性能电源、接口、模拟与混合信号、逻辑线路光电子及可配置产品方面最主要的，集独立设计、制造和营销于一体的跨国公司之一。Fairchild的产品广泛运用于微电子应用领域，包括汽车、通信、电脑、外围设备、工业及消费品应用。Fairchild的总部设在美国缅因州南波特兰市，现于全球拥有9家厂房，5家位于亚太地区，包括中国苏州、菲律宾宿雾、马来西亚吉隆坡和槟城以及韩国釜川。