南京招聘

This is an entry level position for analog layout and circuit design. Engineer will focus on layout design and verification of complex analog circuits such as high performance analog-to-digital converters (ADC), digital-to-analog converters (DAC), filter, adaptive equalizers, clock and data recovery (CDR) circuits, and phase-locked loop (PLL) or other timing circuits. Engineer will also have opportunities to participate in analog circuit simulation.

Qualifications:

– BS/MS in EE.
– Deep understanding on device physics.
– Familiar with analog layout design flow, familiar with EDA layout tools such as Virtuoso, laker and Calibre.
– Familiar with DRC/LVS/ERC rules, script skill is a plus.
– Familiar with CMOS technology, familiar with CMOS ESD and Latch up rules.
– Design experience in analog circuits is a plus, such as Op-Amps, bandgap, regulator, ldo, adc, dac, pll, serdes, etc.
– Familiar with EDA design tools is a plus, such as Hspice, Virtuoso, etc.
– Good team player and communication skills.
– Good English skill.

We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you. Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

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