杭州招聘

Job Summary:

The candidate will be responsible for all aspects of physical design and implementation. In this role, you will participate in the efforts of establishing physical design methodologies and flow automation.

Physical Design Engineer will be part of design development team. The candidate will work on the digital design implementation, and verification of mixed-signal ICs utilizing standard asic tools. Products to be designed/verified include, power management, and mixed signal functions.

MPS products include: switching regulators, sensors, motor control, display drivers, audio amplifiers and power management ICs for fast-growing portable and non-portable markets such as broadband modems, notebooks, cell phones, telecom, fiber optics, digital camera, automobile and network equipment.

Essential Functions:

· Responsible for physical design, development, & verification of digital / mixed-signal IC’s

• Chip & block floorplan/implementation, power/clock distribution, chip assembly, P&R, STA, & LVS/DRC to closure

· Work closely with digital/analog design team for physical implementation and custom analog blocks/interface/IP’s

·

Qualifications:

• Requires advance degree in Elec Engineering/Computer Science or equivalent

· 2+ years(preferred) ASIC design, verification, or related work experience.

· 2+ yrs(preferred) in experience physical digital design.

· Good written/verbal communication English skills and strong team work/collaboration

· Ability to work independently, follow instructions according to design specifications, and executing tasks to hit milestones with quality

· Strong knowledge of ASIC development process and digital design techniques.

· Experience with programming, scripting and automation languages like Perl/TCL/Unix/Python

• Strong technical abilities & understanding in these areas:

o Verilog/SysVerilog coding.

o Synthesis, CTS, DFT, Extraction, and STA closure across multiple process corners.

o Multipower domain, signal integrity, & power/IR drop analysis

o Linting and CDC requirements.

o Expertise in both hand-written and tool-driven functional/timing ECO.

• Physical Design Verification methodology to debug LVS/DRC issues at chip/block level
• Power user of industry physical tools: Cadence Encounter/Innovus tools(preferred) or Synopsys ICC/ICC2

· Experience with the following is desired:

o Physical SOC design including uC design(ARM/RISCV)

o knowledge of power management industry/applications

o I/F: I2C, SPI, USB, PMBUS, etc

芯源系统股份有限公司（Monolithic Power Systems 简称MPS）是一家拥有自主创新工艺技术，专注于新设计和定义高性能电源管理方案的模拟和混合信号半导体公司，目前自主研发电源管理产品已超过4000种，广泛应用于工业、通信基础设施、云计算、汽车以及消费类电子等领域。MPS经过24年的全球市场拓展，目前MPS在美国、中国大陆、中国台湾、韩国、日本、新加坡及欧洲等地建立了20余家分支机构，全球雇员近2500人，其中成都公司在册员工1500余人。自2003年开始，公司先后在中国建立了MPS上海、MPS成都、MPS杭州等公司，并在深圳、北京、西安、广州、南京、武汉、厦门、青岛等地设立了分公司或办事处。
    MPS 2022校园招聘现如约而至，诚邀勇于创新、敢于挑战的你！加入MPS，与芯同行，引领未来！

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