杭州招聘

1. Participate in SOC full Chip DFT feature and architecture definition
2. Implement SOC DFT function including SCAN, MBIST, BSD, Analog Macro test logic.
Perform verification on all DFT structures
3. Generate DFT related timing constraints and work with PD team for timing closure
4. Generate and verify DFT structural patterns and functional patterns
5. Participate in ATE bring-up and debug DFT patterns on ATE
6. Design and implement other DFX (debug, characterization, yield etc)

Requirements:
1. BS/MS with 2+ years' related experience designing DFT for SOCs
2. Solid knowledge of DFT including scan, boundary scan, BIST and JTAG.
3. Familiar with basic Mentor/ Synopsys DFT flow and tools
4. Basic knowledge of IC design flow, including coding, simulation, verification, synthesis and STA
5. Skill and efficiency in scripting using common UNIX scripting languages such as TCL, Perl, csh
6. Strong experience with Verilog RTL design and simulation
7. Good English communication skills
8. Self-motivated and good team player.

埃瓦科技（上海埃瓦智能科技有限公司）成立于2018年，是一家专注于 3D视觉AIoT 芯片研发的科技型公司，面向终端低功耗、快速实时响应3D智能识别市场，提供3D视觉人工智能端到端方案和开放平台，赋能智能安防、智能家居、新零售、智能硬件、机器视觉等人工智能落地场景。公司总部坐落于上海张江科学城，团队汇聚了来自AMD、英特尔、博通、高通等国际知名芯片公司，横跨算法、软件、芯片、视觉、产品的顶尖人才。