MTS Design Verification Engineer for Graphics IP
超威半导体(中国)有限公司
- 公司规模:1000-5000人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2019-03-29
- 工作地点:上海-浦东新区
- 招聘人数:1人
- 工作经验:3-4年经验
- 学历要求:本科
- 职位类别:半导体技术
职位描述
Responsibilities:
· IP/block Spec / testplan documentation.
· IP/block level test environment / test-bench setup.
· Test case write and debug in IP/block levels for develop function, coverage and performance.
· Work closely with SW team for development.
· Work closely with FPGA/synstem engineering for pre-silicon or post-silicon debug/test if needed.
Requirements:
· A minimum of M.S. in Computer Science, EE or equivalent.
· 5+ years working experience in Graphics IP design or verification.
· Multiple projects experience on High Speed IC design.
· Strong skill on Verilong & C++/UVM, and strong problem-solving skills.
· Good communication skills on Mandarin and English, and good teamwork.
· Would be a plus if having other IP developing experience.
职能类别: 半导体技术
公司介绍
联系方式
- Email:bella.yu@amd.com
- 公司地址:上海-浦东新区 张江 环科路669号凯瑞大厦