成都招聘

Responsibilities:
l Responsibilities will include developing verification environment;
l developing test plans for and verifying the function of ASIC;
l hands-on implementation work for every aspect of ASIC verification, working closely with the system group, architects, design and verification teams;
l The successful candidate should have experience going through at least one complete and successful ASIC design/verification cycle from architecting and creating ASIC test environment to full completion of the verification work.
l The candidate also needs to have a full understanding of design using Verilog and working experience with SystemVerilog. A strong communication skill in both Chinese and English is required.
任职资格的具体描述：
Qualifications:
l 5+ years of ASIC verification experience, complex SOC verification experience is preferred
l Strong programming skills in SystemVerilog
l Knowledgeable in Verilog/Verilog-PLI/SystemC/SVA/C/C++
l Working Experience with UVM/OVM/VMM (at least one of them)
l Responsible for implementation of verification environment and generation of high quality test cases.

上海芯海集成电路有限公司专注于成员企业之间的优势互补并加强她们之间的通力合作，从事芯片设计等等方面研发的工程师组成。