成都招聘

职位描述：
ASIC Design Engineer (audio codec)


Job Description
? Responsible for or participate in Audio Codec RTL design and verification
? Verilog RTL design at module level and chip level integration
? Design of high performance and low power Audio Codec and Audio Signal Processor
? Provide support on DFT, FPGA, front end implementation, and perform power analysis
Qualifications:
? 3+ years’ experience on Verilog RTL design and related project development on Audio Codec or Audio Signal Processor
? Experience in low power design
? Knowledge of Soundwire (MIPI) and Intel High Definition Audio is a plus!
? Domain knowledge on Audio Codec, Audio Signal Processor, and USB is a plus
? Strong DSP and Matlab background is a plus

工作描述：
- 熟悉Verilog/SystemVerilog设计语言，进行SoC系统级集成工作，包括时钟，复位设计等。
- 根据设定的芯片构架，细化设计方案，编写设计手册，独立完成RTL详细设计，以及模块级验证任务
- 熟练使用主流EDA设计仿真工具，熟悉Perl, Tcl 等基本的脚本编程
- 能够承担或协助FPGA原型验证工作
- 能够进行基本的逻辑综合以及静态时序分析

职位需求：
- 三年以上芯片设计工作经验，至少一次成功流片经验。
- 微电子、计算机、通信工程等相关专业硕士以上学历
- 有音频芯片开发经验者优先。
- 有DFT设计经验者优先
- 熟悉低功耗设计者优先
- 有数字信号处理类芯片开发经验者优先
- 良好的团队合作精神，较强的沟通能力 举报 分享

美国科胜讯国际有限公司是全球无工厂IC设计公司之一，在众多的市场上，科胜讯已经确立了拥有世界一流客户群的全球领导地位。今天，科胜讯的系统级解决方案已经应用到全世界70％以上的传真机和80％的CDMA电话之中，另外还有60％以上的互联网连接是通过科胜讯的设备实现的。

Conexant Systems, Inc. (NASDA: CNXT) is a worldwide leader in semiconductor solutions
for broadband communications, enterprise networks and the digital home. Conexant's
innovative semiconductor system solutions enable global access networks, and are driving digital home information and entertainment networks worldwide. The company has leveraged its expertise and leadership position in modem technologies to enable more Internet connections than all of its competitors combined, and continues to develop leading integrated silicon solutions for broadband access and media processing networks.

Conexant website: http://www.conexant.com