Senior Layout Engineer (职位编号:17668BR)
德州仪器半导体技术(上海)有限公司
- 公司规模:150-500人
- 公司性质:外资(欧美)
- 公司行业:电子技术/半导体/集成电路
职位信息
- 发布日期:2016-11-08
- 工作地点:国外
- 招聘人数:1人
- 工作经验:5-7年经验
- 学历要求:硕士
- 语言要求:英语 精通
- 职位类别:其他
职位描述
职位描述:
Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors.
Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world’s brightest minds, TI creates innovations that shape the future of technology. TI is helping more than 100,000 customers transform the future, today. We’re committed to building a better future from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us – change the world, love your job! As a senior layout engineer you will execute and coordinate layout of complex analog/power devices in Bicmos technology. Responsibilities include: - Actively involving in preliminary floorplan, pinout, package MB diagram. - Validating initial die size estimate. - Participating in local and remote weekly meetings with the team and updating the team on the progress and state of the layout. - Interfacing with design lead to create and validate overall layout plan and layout schedule. - Getting aligned with Santa Clara layout team on best layout practices and considering them on your layout. - Driving overall IC and subsystem layout execution, quality and coordinating activities of layout team. - Working with design team on power device placement and metallization. - Participating in weekly PDK meeting and highlighting newly developed rules for new technologies to design and layout team. - Implementing cell, subsystem and top level layout. - Working with design lead to get directions on how to solve technical problems. - Working with design lead to define top level power, I/O routing and ESD scheme, electro-migration and dropout/kelvin connection requirements. - Working with design lead to review/approve subsystem, cell and top level layout. - Working with Santa Clara layout team on understanding of potential errors and resolving them. - Leading extensive layout review meeting for in-depth understanding of possible issues and risks on the layout - Considering high voltage rules in floor planning and device placement and work with DRC team closely to understand the rules and highlight any possible issues with rule checker. - Being in contact with process platform manager and having PG done and reviewing jobdeck before ordering mask set and be up-to-date on the ruleset which needs to be run.
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Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors.
Texas Instruments Incorporated (TI) is a global semiconductor design and manufacturing company that develops analog ICs and embedded processors. By employing the world’s brightest minds, TI creates innovations that shape the future of technology. TI is helping more than 100,000 customers transform the future, today. We’re committed to building a better future from the responsible manufacturing of our semiconductors, to caring for our employees, to giving back inside our communities and developing great minds. Put your talent to work with us – change the world, love your job! As a senior layout engineer you will execute and coordinate layout of complex analog/power devices in Bicmos technology. Responsibilities include: - Actively involving in preliminary floorplan, pinout, package MB diagram. - Validating initial die size estimate. - Participating in local and remote weekly meetings with the team and updating the team on the progress and state of the layout. - Interfacing with design lead to create and validate overall layout plan and layout schedule. - Getting aligned with Santa Clara layout team on best layout practices and considering them on your layout. - Driving overall IC and subsystem layout execution, quality and coordinating activities of layout team. - Working with design team on power device placement and metallization. - Participating in weekly PDK meeting and highlighting newly developed rules for new technologies to design and layout team. - Implementing cell, subsystem and top level layout. - Working with design lead to get directions on how to solve technical problems. - Working with design lead to define top level power, I/O routing and ESD scheme, electro-migration and dropout/kelvin connection requirements. - Working with design lead to review/approve subsystem, cell and top level layout. - Working with Santa Clara layout team on understanding of potential errors and resolving them. - Leading extensive layout review meeting for in-depth understanding of possible issues and risks on the layout - Considering high voltage rules in floor planning and device placement and work with DRC team closely to understand the rules and highlight any possible issues with rule checker. - Being in contact with process platform manager and having PG done and reviewing jobdeck before ordering mask set and be up-to-date on the ruleset which needs to be run.
职能类别: 其他
公司介绍
TI China
TI China began operations in 1986 in Beijing. Today, we employ more than 2200 employees in our 17 sales & applications offices, three research & development centers, one integrated manufacturing center with wafer fab, assembling & testing and bumping facilities, as well as one product distribution center. Our unparalleled resources deployed in China enable us to provide strong support in every step from design and manufacturing to sales and product distribution to over 17000 customers in China across industrial, automotive, communications, personal electronics and enterprise market. Our engineers and professionals are committed to shaping the future of electronics through semiconductors and helping our customers succeed in China and around the world.
TI China began operations in 1986 in Beijing. Today, we employ more than 2200 employees in our 17 sales & applications offices, three research & development centers, one integrated manufacturing center with wafer fab, assembling & testing and bumping facilities, as well as one product distribution center. Our unparalleled resources deployed in China enable us to provide strong support in every step from design and manufacturing to sales and product distribution to over 17000 customers in China across industrial, automotive, communications, personal electronics and enterprise market. Our engineers and professionals are committed to shaping the future of electronics through semiconductors and helping our customers succeed in China and around the world.
联系方式
- 公司地址:科技南十二路28号康佳研发大厦9层