北京招聘

职位描述：
Job Description ：
1. Participate in SOC full Chip DFT feature and architecture definition
2. Implement SOC DFT functions including SCAN, Boundary SCAN, MBIST, Analog Macro test logic.
3. Perform verification on all DFT structures
4. Generate DFT related timing constraints and work with PD team for timing closure
5. Generate and verify DFT structural patterns and functional patterns
6. Participate in ATE bring-up and debug the DFT patterns on ATE
7. Design and implement other DFX (debug, characterization, yield etc) logics

Requirements/Qualifications:
* Have AMD working experience, AMD former employee priorities.
 - BS in EE & CS, with 3+ years’ experience in AMD.
- Experience in complex ASIC design (multi-million gates) in DFT/DFD techniques such as JTAG/IEEE standards, scan and ATPG, on-chip test pattern compression and at-speed testing using PLL, memory BIST and repair, logic BIST, power-gating, on-chip debug logic.
- Hands on working experience on ASIC DFT design and verification
- Familiar with ASIC design flow
- Experience with micro processor design a big plus
- Should have strong problem solving skills
- Good English hearing, speaking, reading and writing capabilities
- Good communication skills 举报 分享

AMD公司成立于1969年，总部位于美国加利福尼亚州桑尼维尔。AMD（NYSE: AMD）是一家创新的科技公司，致力于与客户及合作伙伴紧密合作，开发下一代面向商用、家用和游戏领域的计算和图形处理解决方案。AMD的业务遍布全球，拥有约为12000名员工。