北京招聘

职位描述：
Memory Layout
1. Physical Design for Memory Products: Full custom Layout for analog and digital circuits in High performance DRAMs.
2. Floor planning signal- and bus planning according to predefined specifications.
3. Chip size optimization.
4. Area- and parasitic optimized layout.
5. Assembly of BLKs and top level hierarchies including routing.
6. Verification of circuits (Design Rule Check, Layout versus Schematic, Electrical rule check).
7. Generation of fill structures according to technology requirements.
8. Optical simulations on technology driven circuits.
9. Investigations on Electro migration and IR drop.
Requirements:
1. Bachelor in Microelectronics, Electronic Engineering, or related field.
2. Familiar with CAD software.
3. Familiar with semiconductor process and structures of devices.
4. Team oriented, love to work in young, international and highly motivated teams.
5. Good communication skills.
6. High grade of flexibility.
7. Highly motivated and engaged.
8. Experience in digital analog and or mixture signal IC is preferred.
9. Experience in Flash,SRAM and DRAM design is preferred.
10. Experience in backend design flow (APR) is preferred.
11. English language skill in writing and speaking is a must.
 
Memory layout designer
全定制版图设计者，根据各种模拟电路或者存储器电路进行版图设计，并通过各种物理验证和各种细节检查，然后制作报告书。
岗位要求:
本科及以上学历，集成电路或微电子或电子等相关专业；
熟悉集成电路设计流程，2年以上模拟或者存储器版图设计经验；
精通Linux 操作系统，熟悉cshell或者perk/awk语言等，精通其中一项语言者有加分；
能够熟练使用laker和virtuoso软件制作版图，能够熟练使用calibre或者hercules进行DRC,LVS等相关验证，精通tcl或者skill语言者有加分； 举报 分享

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