北京招聘

As a Manager of our rapidly expanding international team of Mixed Signal IP Corporate Applications Engineers (MSIP-CAE) in China, you will influence the continued success of Synopsys' Mixed Signal IP usage with ASIC designers, IDMs, and OEMs. You will provide guidance, mentorship, and direction for the MSIP-CAE team in China. You will interact with senior personnel, functional peer group managers within Synopsys and major international customers.

Specific responsibilities include: managing post-sales technical support activities such as implementation & training; define and prioritize support roles; create policies; goal setting and results tracking of internal and external requirements, and advise senior management on specialized technical or business issues. You will also participate effectively in product enhancements, new release processes, development of test plans, representation of customer issues and other core team activities.

Requirements

BSEE, MSEE with 7+ years in the field of ASIC design with at least 3 years of Management experience
Demonstrated ability to strengthen the team by recruiting excellent engineers and by improving skills of existing team members through coaching and mentoring.

Excel in solving complex problems individually and with other team members to create highly differentiated solutions in the market.

Must have excellent organization skills, strong communication skills and ability to interact with customers

Proven track record in meeting tight schedules and handling multiple projects concurrently
Experience with advanced technology processes (40nm/28nm/20nm) circuit design

Relevant experience in design, implementation or technical support with mixed signal designs is highly desired.

Requires the ability to change the thinking of, or gain acceptance from, others in sensitive situations, without damage to the relationship.

Ability to travel internationally for periods of 1 week

Desired Skills & Experience

Knowledge of any interface protocols like USB, PCIe, SATA, XAUI, CEI6G, HDMI, MIPI etc..

Recent experience with ASIC implementation EDA tools and flows in the areas of Verilog, Synthesis, Simulation, STA, Verification, Testability, Place and Route, Design Reuse and/or Physical Design
Hardware debug and troubleshooting skills.

Synopsys公司（Nasdaq：SNPS）是为全球集成电路设计提供电子设计自动化（EDA）软件工具的企业。为全球电子市场提供先进的IC设计与验证平台，致力于复杂的芯片上系统（SoCs）的开发。同时，Synopsys公司还提供知识产权和设计服务，为客户简化设计过程，提高产品上市速度。新思公司总部设在美国加州硅谷，有超过60家分公司分布在北美、欧洲、日本与亚洲。
Synopsys,Inc.[Nasdaq:SNPS],headquartered in Mountain View,California,creates leading electronic design automation(EDA)tools for the global electronics market.The company delivers advanced design technologies and solutions to developers of complex integrated circuits,electronic systems and systems on a chip.Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers.
Over the past several years,Synopsys has entered into partnerships with IBM,SGS-Thomson,SEMATEC,Toshiba and others to develop tools and design flows for complex IC and ASIC designs at 0.25 micron and below.The Company has also partnered with programmable logic vendors and other EDA companies to tackle issues ranging from the impact of complex silicon in programmable devices to sound design reuse strategies.

You'd better submit your resume via jobs-china@synopsys.com.