北京 [切换城市] 北京招聘北京计算机软件招聘北京计算机辅助设计工程师招聘

System CAE (Hardware/Software, Embedded System)

新思科技(上海)有限公司

  • 公司规模:500-1000人
  • 公司性质:外资(欧美)
  • 公司行业:电子技术/半导体/集成电路

职位信息

  • 发布日期:2014-05-22
  • 工作地点:武汉
  • 招聘人数:若干
  • 职位类别:计算机辅助设计工程师  

职位描述

The candidate will be to work closely with Synopsys customers, enabling them to design embedded systems based hardware through the efficient use of our CPU core offerings. The systems engineer will be required to prepare board-level demos, benchmark ARC technologies and prepare competitive analysis. The systems engineer will also be required to investigate and answer in-depth technical questions about Synopsys ARC processors as well as the RTL design / debug / verification.

Recent graduates and experienced engineers are welcome. Please submit your resume if you meet the "MUST" requirements and at least one "helpful" qualification.

Key responsibilities:
? Provide ARC core specific hardware development ARChitect tool chain support to Synopsys's customer base/field teams
? Strong problem solving ability for RTL and debug through verification capability.
? Provide technical content for Synopsys support site (Application Notes, Technical Articles, FAQs)
? Feedback to R&D and marketing on problematic product areas and required product enhancements
? Participation in product review and release process within technology domain of supported product

Requirements (MUST):
? RTL Coding (Verilog/System Verilog/System C).
? Embedded systems programming.
? Knowledge of at least one microprocessor/DSP architecture.
? Experience of hardware development using Verilog for ASIC or FPGA development including Usage of RTL coding (Verilog/System Verilog), logic simulation and synthesis, timing analysis, and verification methodologies.
? Strong problem solving ability and debug through verification capability.
? Excellent oral and written communication skills (English).
? Ability and desire to learn.

Helpful qualifications:
? Previous customer facing experience desirable.
? Domain knowledge of ISS (instruction Set Simulator) and FPGA emulation a strong plus.
? Comfortable with System C or System Verilog Platform development.
? Knowledge of TCL/TK scripting language.
? Knowledge of silicon level implications on area, low power, and speed performance.
? Knowledge using compilers, linkers, assemblers and debuggers and run subset test programs on
? CPU core in C/C++ and assembly code.
? Experience in creating customer oriented documentation through usage of commercial standards, such as FrameMaker or equivalent.

公司介绍

Synopsys公司(Nasdaq:SNPS)是为全球集成电路设计提供电子设计自动化(EDA)软件工具的企业。为全球电子市场提供先进的IC设计与验证平台,致力于复杂的芯片上系统(SoCs)的开发。同时,Synopsys公司还提供知识产权和设计服务,为客户简化设计过程,提高产品上市速度。新思公司总部设在美国加州硅谷,有超过60家分公司分布在北美、欧洲、日本与亚洲。
Synopsys,Inc.[Nasdaq:SNPS],headquartered in Mountain View,California,creates leading electronic design automation(EDA)tools for the global electronics market.The company delivers advanced design technologies and solutions to developers of complex integrated circuits,electronic systems and systems on a chip.Synopsys also provides consulting and support services to simplify the overall IC design process and accelerate time to market for its customers.
Over the past several years,Synopsys has entered into partnerships with IBM,SGS-Thomson,SEMATEC,Toshiba and others to develop tools and design flows for complex IC and ASIC designs at 0.25 micron and below.The Company has also partnered with programmable logic vendors and other EDA companies to tackle issues ranging from the impact of complex silicon in programmable devices to sound design reuse strategies.

You'd better submit your resume via jobs-china@synopsys.com.

联系方式

  • 公司网站:http://www.synopsys.com
  • Email:jobs-china@synopsys.com.Job
  • 公司地址:上海市长宁路1027号,兆丰广场14-16楼
  • 邮政编码:200050
  • 联系人:Synopsys Recruiter